- V853 ARM A7 + RISC-V E907 + 1T NPU
- UP to 2GiB DDR3 and 128GiB EMMC
- Raspberry Pi Camera Connector
- 4 lane MIPI-CSI
- 4 lane MIPI-DSI up to 1920x1200
- Built-in USB to UART Support RV and ARM
- Built-in XR829 Wi-Fi BT
- Raspberry Pi A Size and Pinout
Best posts made by YuzukiTsuru
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Porject Yosemite - 基于全志V853的开发板posted in V853
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全志开发工具，量产工具下载posted in 全志方案讨论区
存放一些互联网上搜集到的相关工具
驱动
USB升级和量产工具
LiveSuit_ForMac.zip
LiveSuitV306_For_Linux32.zip
LiveSuitV306_For_Linux64.zipPhoneixUSBPro_V_4_0_0__2014-09-12EN.rar
PhoneixUSBPro_V_4_0_0__2014-09-12CN.rar
PhoenixUSBPro User Manual.pdfPhoenixPacket_V335_20140610.rar
PhoenixSuitV1.07_CN.rar
PhoenixSuitv1.07开发者版本.rar
PhoeniSuitRelease20201225.zip.zip
PhoenixSuit_msi_1.19.zip固件修改工具
DragonFace.zip
dragonface_v2.6.1.7z
DragonSN_v2.7.2.zip卡升级和量产工具
PhoenixCard_V310_20130618.rar
PhoenixCard4.2.6.zip
PhoenixCardv4.2.7.7z其他工具
DebugView.zip
HerculesV100.rar
LogoGen.zip
OEMDataPacket_v102.rar
SNWriter.rar第三方工具
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Lichee RV 内存小了？改到2G来玩！posted in D1-H/D1s
在这之前
这是一个计算条，D1核心配上512MB内存。
运行正常系统已经完全够用了，不过我不是那种正常的人，写的一个小程序经常把内存用完被oom杀了。
++内存
查阅了一下资料（某宝），发现我钱包能承担的2G内存颗粒只有D9STR，也就是镁光MT41K1G16DGA-125:A，全新芯片280左右，但是二手只需要135。Datasheet显示这是一颗双晶DDR3L芯片。
那就麻烦了，如果RV板子没有提供Two Rank，那就没办法驱动这颗芯片。于是查阅了Lichee RV的电路图
好欸，LicheeRV 的CS#，ODT#，CK都是按照TwoRank的接法连接的，所以可以直接替换了！准备材料
- Lichee RV 计算条*1
- 热风枪*1
- 电烙铁*1
- D9STR*1
- 焊接材料若干
- 洗板水+清洁材料
开始魔改
注意，魔改有失败风险，保修肯定是没有了。请确认拥有BGA拆焊能力再进行魔改！
风枪温度360，风速40。拆焊之前记得上点油。焊接BGA差不多了要用镊子轻轻推一下，看看会不会归位，如果可以归位那就焊接完成了。
当然颜值党肯定要把焊油洗干净的QwQ
结果
再跑跑那个程序
。。。。。。。。。。。。我回去改算法了
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D1 LicheeRV Dock 移植RTL8723DS驱动posted in D1-H/D1s
RTL8723DS焊接上去了，现在把驱动程序移植上去。
咱先获取源码：https://github.com/lwfinger/rtl8723ds
下载完成后，把驱动文件复制到
tina-d1-open\lichee\linux-5.4\drivers\net\wireless\rtl8723ds里，没有rtl8723ds文件夹记得新建一个。
修改
tina-d1-open\lichee\linux-5.4\drivers\net\wireless\Makefile，加一行obj-$(CONFIG_RTL8723DS) += rtl8723ds/
修改
tina-d1-open\lichee\linux-5.4\drivers\net\wireless\Kconfig，加一行source "drivers/net/wireless/rtl8723ds/Kconfig"
修改
tina-d1-open\lichee\linux-5.4\drivers\net\wireless\rtl8723ds\os_dep\linux\os_intfs.c
加一行MODULE_IMPORT_NS(VFS_internal_I_am_really_a_filesystem_and_am_NOT_a_driver);
修改
tina-d1-open\lichee\linux-5.4\drivers\net\wireless\rtl8723ds\os_dep\linux\rtw_cfgvendor.c
在每一行.policy = VENDOR_CMD_RAW_DATA,下面加上.maxattr = 1,
修改
tina-d1-open\target\allwinner\d1-lichee_rv_dock\modules.mk，增加以下内容：define KernelPackage/net-rtl8723ds SUBMENU:=$(WIRELESS_MENU) TITLE:=RTL8723DS support (staging) DEPENDS:= +r8723ds-firmware +@IPV6 +@USES_REALTEK FILES:=$(LINUX_DIR)/drivers/net/wireless/rtl8723ds/8723ds.ko AUTOLOAD:=$(call AutoProbe,8723ds) endef define KernelPackage/net-rtl8723ds/description Kernel modules for RealTek RTL8723DS support endef $(eval $(call KernelPackage,net-rtl8723ds))（其中的
d1-lichee_rv_dock是我的板级配置，请选择自己的板级配置比如d1-nezha，如下图）
进入内核配置，勾选Realtek 8723D SDIO or SPI WiFi为Module（<M>不是<*>）
make kernel_menuconfig Device Drivers -> Network device support -> Wireless LAN -> <M> Realtek 8723D SDIO or SPI WiFi进入Tina配置，勾选相关驱动
make menuconfig Firmware -> <*> r8723ds-firmware.............................. RealTek RTL8723DS firmware Kernel modules -> Wireless Drivers -> <*> kmod-net-rtl8723ds........................... RTL8723DS support (staging)保存，编译，打包
make -j65535 pack烧录后就能看到了
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没有芯片，拿PS画一个 YuzukiCore T113-S3 小型双核ARM核心板posted in 灌水区
大哥二哥拍个照
这是原图
用仿章工具，把F133的1抄过去，再仿一个T
把3缩小了放在后面，复制两份，一份用画笔画出S的样子，再打上噪点
完工
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【开源直播】手把手教你用全志XR32芯片DIY一个自己的开发板（一：电路与PCB绘制）posted in XR32
XR32
【XR32】：完整型号【XR32F429】
是全志推出MCU芯片，听名字就知道，对标的是某tm/某sp32，可以用来做各自小板子、小车车、小电子设备、实验装置等等等
XR32F429 基于主频最高可达 192MHz 的高性能 ARM Cortex-M4F 32 位 RISC 内核。 Cortex-M4F 内核具有一个浮点单元 (FPU) 单精度，它包含所有 ARM 单精度数据处理指令和数据类型。 它还实现了一个内存保护单元 (MPU)，可实现应用程序安全性。 它支持集成的 832KB SRAM 和 2MB 闪存 ROM。 它还包括许多外设，包括 UART、TWI、SPI、I2S、DMIC、PWM、IrDA (T/R)、CSI、SDIO 和辅助 ADC。
The XR32F429 devices are based on the high-performance ARM Cortex-M4F 32-bit RISC core operating at frequency up to 192MHz. The Cortex-M4F core features a Floating Point Unit (FPU) single precision which all ARM single-precision data-processing instructions and data types. It also implements a memory protection unit (MPU) which enables application security. It supports an integrated 832KB SRAM and 2MB Flash ROM. It also includes many peripherals, including UART, TWI, SPI, I2S, DMIC, PWM, IrDA (T/R), CSI, SDIO and auxiliary ADC.
芯片特性
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集成高性能ARM Cortex-M4F内核，并配备832KB SRAM和16Mbit Flash
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集成硬件加解密引擎，保障数据传输与存储的安全
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集成度高，集成UART，SPI，I2C，PWM，ADC，SDIO，IrDA，I2S，DMIC，CSI等丰富的接口
-
平台
- ARM Cortex-M4F内核，最高192MHz运行频率
- 内置832KB SRAM
- 支持低功耗RTC模式
- 集成2Kbit efuse
- 6mm x 6mm 52pin QFN封装
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加解密引擎
- 支持AES ECB/CBC/CTR，128/192/256位秘钥
- 支持DES/3DES
- 支持MD5/SHA/SHA256/CRC16/CRC32/PRNG
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外设
- 2路SPI，3路UART，2路I2C，1路SDIO，IrDA
- 8路PWM，8路ADC，GPIO若干
- 1xI2S，1xDMIC，1xCSI
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电源
- 单电源输入，宽电压范围2.7V-5.5V支持
- 集成200mA 3.3VLDO，可用于外设供电
- 内置DC-DC和LDO供内部电路使用
- 支持低电检测
- 支持系统关机/休眠状态唤醒
-
时钟
- 24MHz XTAL
- 32768低频时钟
-
其他
- 工作温度-40~85℃， 存储温度-40~135℃
- ESD HBM ±4000V，CDM ±800V
楼主目前得到了XR32的全球独家权限，准备基于该芯片做一个开发板。所有软硬件将全部开源，方便后面的同学参考学习。
从0开设DIY一个自己的开发板，并适配代码让它跑起来，应该是每个嵌入式工程师入门的入门之路吧，希望大家通过跟着我们操作走一遍，可以摸清入门的路~
楼主目前普通本科物联网专业大二在读，相信我能完成的内容各位同学们都能完成。芯片框图：
硬件：
本项目将使用立创EDA进行进行原理图设计和PCB layout（因为它免费而且不用下载适合学生朋友使用）
XR32的封装库后续会建好在立创EDA上直接开源，大家可以直接调用
个人立创硬件开源平台主页：https://oshwhub.com/GloomyGhostXR芯片后面会放到全志系的淘宝店上销售，价格人民币一位数。同时也准备放到立创商城，大家下单打板就能直接调立创商城里的货，这样就不用寄来寄去了（和立创商城的人沟通中）。
软件
使用全志官方支持的FreeRTOS系统，适配自己做的开发板，代码全部开源，github/gitee双边同步
github地址：https://github.com/YuzukiHD/XR32SDK
gitee地址：https://gitee.com/GloomyGhost/xr32-sdk芯片资料
XR32 datasheet:XR32F429C2_Datasheet_V1.2.pdf
XR32 User_manual:XR32F429C2_User_Manual_V1.0.pdf硬件参考资料
XR32参考设计原理图.7z
XR32封装库.7z
XR32参考设计原理图AD版本.zip
XR32F429C2 LCEDA封装
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在 Lichee RV 上玩游戏：DOOMposted in D1-H/D1s
移植了一下DOOM到 Lichee RV 上，用SDL管理所以要打开SDL的packages
顺便把DOOM也加入packages了
用Lichee RV Dock玩（视频不知道怎么就反了hhhh
当然怎么能少了86Panel
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Reply: 【开源直播】手把手教你用全志XR32芯片DIY一个自己的开发板（二：PCB焊接调试）posted in XR32
焊接完成，上电，UART检测到了，但是测试烧录有点问题
量了一下芯片输出，怎么0V没有电压？？？
再用示波器看了一下IO的输出，发现呈现一种上电掉电的感觉，感觉像是板子在不停重置
再比较看一下RESET相关电路
我画的
官方的
寄了，官方上拉是拉到VBUS的，也就是USB电源，我这里拉的是3V3，看来XR32默认上电的时候是不输出3V3的。那好办，飞线伺候
烧录进去了
跑起来了
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使用 LicheeRV 86 Panel 与 Tina BSP 实现 RGB 与 SPI 双屏显示posted in D1-H/D1s
Tina 提供了2种 SPI TFT 显示屏的驱动方式。第一种是官方推荐的
fbdev方式，使用Framebuffer implementaion without display hardware of AW进行 SPI屏幕的驱动。另外一种是使用fbtft进行 SPI 屏幕驱动。fbdev方式由于pinctrl在新内核中调用方式出现修改，所以暂时无法使用。修改难度较大。fbtft虽然官方wiki表明不建议在 Linux 5.4 中使用，但是其实也是可以使用的，只需要修改一下 GPIO 的注册方式就行。先驱动 SPI 屏幕
这里驱动的屏幕所选择的是 ST7789V SPI
修改 FBTFT 驱动
进入
tina-d1-open/lichee/linux-5.4/drivers/staging/fbtft找到fbtft-core.c首先加入将要使用到的头文件
#include <linux/gpio.h> #include <linux/of_gpio.h>然后找到
static int fbtft_request_one_gpio()函数，将已经弃用的端口绑定方法改为以下内容static int fbtft_request_one_gpio(struct fbtft_par *par, const char *name, int index, struct gpio_desc **gpiop) { struct device *dev = par->info->device; struct device_node *node = dev->of_node; int gpio, flags, ret = 0; enum of_gpio_flags of_flags; if (of_find_property(node, name, NULL)) { gpio = of_get_named_gpio_flags(node, name, index, &of_flags); if (gpio == -ENOENT) return 0; if (gpio == -EPROBE_DEFER) return gpio; if (gpio < 0) { dev_err(dev, "failed to get '%s' from DT\n", name); return gpio; } flags = (of_flags & OF_GPIO_ACTIVE_LOW) ? GPIOF_OUT_INIT_LOW : GPIOF_OUT_INIT_HIGH; ret = devm_gpio_request_one(dev, gpio, flags, dev->driver->name); if (ret) { dev_err(dev, "gpio_request_one('%s'=%d) failed with %d\n", name, gpio, ret); return ret; } *gpiop = gpio_to_desc(gpio); fbtft_par_dbg(DEBUG_REQUEST_GPIOS, par, "%s: '%s' = GPIO%d\n", __func__, name, gpio); } return ret; }找到
static void fbtft_reset()函数，将 RST 信号最后拉高static void fbtft_reset(struct fbtft_par *par) { if (!par->gpio.reset) return; fbtft_par_dbg(DEBUG_RESET, par, "%s()\n", __func__); gpiod_set_value_cansleep(par->gpio.reset, 1); msleep(10); gpiod_set_value_cansleep(par->gpio.reset, 0); msleep(200); gpiod_set_value_cansleep(par->gpio.reset, 1); msleep(10); }找到
static void fbtft_set_addr_win()函数，添加地址偏移。否则会出现下图部分雪花屏现象。
static void fbtft_set_addr_win(struct fbtft_par *par, int xs, int ys, int xe, int ye) { switch(par->info->var.rotate) { case 0: xs+=53;xe+=53;ys+=40;ye+=40; break; case 90: xs+=40;xe+=40;ys+=53;ye+=53; break; case 180: xs+=53;xe+=53;ys+=40;ye+=40; break; case 270: xs+=40;xe+=40;ys+=53;ye+=53; break; default : break; } write_reg(par, MIPI_DCS_SET_COLUMN_ADDRESS, (xs >> 8) & 0xFF, xs & 0xFF, (xe >> 8) & 0xFF, xe & 0xFF); write_reg(par, MIPI_DCS_SET_PAGE_ADDRESS, (ys >> 8) & 0xFF, ys & 0xFF, (ye >> 8) & 0xFF, ye & 0xFF); write_reg(par, MIPI_DCS_WRITE_MEMORY_START); }找到
fb_st7789v.c，参照STM32的初始化函数对初始化部分进行修改。static int init_display(struct fbtft_par *par) { par->fbtftops.reset(par); mdelay(50); write_reg(par,0x36,0x00); write_reg(par,0x3A,0x05); write_reg(par,0xB2,0x0C,0x0C,0x00,0x33,0x33); write_reg(par,0xB7,0x35); write_reg(par,0xBB,0x19); write_reg(par,0xC0,0x2C); write_reg(par,0xC2,0x01); write_reg(par,0xC3,0x12); write_reg(par,0xC4,0x20); write_reg(par,0xC6,0x0F); write_reg(par,0xD0,0xA4,0xA1); write_reg(par,0xE0,0xD0,0x04,0x0D,0x11,0x13,0x2B,0x3F,0x54,0x4C,0x18,0x0D,0x0B,0x1F,0x23); write_reg(par,0xE1,0xD0,0x04,0x0C,0x11,0x13,0x2C,0x3F,0x44,0x51,0x2F,0x1F,0x1F,0x20,0x23); write_reg(par,0x21); write_reg(par,0x11); mdelay(50); write_reg(par,0x29); mdelay(200); return 0; }将屏幕大小配置为屏幕实际大小
static struct fbtft_display display = { .regwidth = 8, .width = 135, .height = 240, .gamma_num = 2, .gamma_len = 14, .gamma = DEFAULT_GAMMA, .fbtftops = { .init_display = init_display, .set_var = set_var, .set_gamma = set_gamma, .blank = blank, }, };设备树修改
首先打开电路图，找到 SPI 屏幕的电路。
根据电路，找到
pio节点，添加 SPI0 所用引脚，spi0_pins_a作为数据时钟绑定，spi0_pins_b作为 CS 的绑定，并上拉。RST，DC，背光在这里不做声明。spi0_pins_a: spi0@0 { pins = "PC2", "PC4"; function = "spi0"; drive-strength = <10>; }; spi0_pins_b: spi0@1 { pins = "PC3"; function = "spi0"; drive-strength = <10>; bias-pull-up; };然后找到 SPI0 节点，添加屏幕使用的设备树。使用
pinctrl-0将pio中定义的 SPI 引脚进行注册。RST，DC，背光在这里进行绑定，并设置其工作电平。&spi0 { clock-frequency = <100000000>; pinctrl-0 = <&spi0_pins_a &spi0_pins_b>; status = "okay"; st7789v@0 { status = "okay"; compatible = "sitronix,st7789v"; reg = <0>; spi-max-frequency = <32000000>; rotate = <90>; rgb; fps = <30>; buswidth = <8>; reset = <&pio PC 6 GPIO_ACTIVE_LOW>; dc = <&pio PC 5 GPIO_ACTIVE_LOW>; led = <&pio PD 18 GPIO_ACTIVE_HIGH>; debug = <1>; }; };最后，将不需要的屏幕关闭，方便调试
&disp { disp_init_enable = <0>; ...... } &lcd0 { lcd_used = <0>; ...... } &hdmi { hdmi_used = <0>; ...... }内核配置
进入
kernel_menuconfig，开启 FBTFT，关闭 RGB，MIPI 所使用的DISP Driver Support(sunxi-disp2)输出。Device Drivers ---> Graphics support ---> Frame buffer Devices ---> <*> Support for frame buffer devices ---> Video support for sunxi ---> < > DISP Driver Support(sunxi-disp2) [*] Staging drivers ---> <*> Support for small TFT LCD display modules ---> <*> FB driver for the ST7789V LCD Controller由于上面配置关闭了
DISP Driver Support(sunxi-disp2)，所用需要在menuconfig里将内核模块关闭，否则会出现找不到驱动的错误。Kernel modules ---> Video Support ---> < > kmod-sunxi-disp....................................... sunxi-disp support < > kmod-sunxi-g2d......................................... sunxi-g2d support < > kmod-sunxi-hdmi....................................... sunxi-hdmi support < > kmod-sunxi-uvc......................................... sunxi-uvc support编译，打包，使用
fbviewer进行测试make -j65535 pack fbviewer Yuzuki.jpg
修改为双屏驱动
修改双屏也很简单，SPI 屏幕调试完成之后，将刚才关闭的各类驱动打开即可。
配置设备树
找到 SPI0 节点，将背光
led注释掉，查看电路图可知 RGB 屏幕和 SPI 屏幕使用的背光是同一个，这里不需要分开注册。&spi0 { clock-frequency = <100000000>; pinctrl-0 = <&spi0_pins_a &spi0_pins_b>; status = "okay"; st7789v@0 { status = "okay"; compatible = "sitronix,st7789v"; reg = <0>; spi-max-frequency = <32000000>; rotate = <90>; rgb; fps = <30>; buswidth = <8>; reset = <&pio PC 6 GPIO_ACTIVE_LOW>; dc = <&pio PC 5 GPIO_ACTIVE_LOW>; // led = <&pio PD 18 GPIO_ACTIVE_HIGH>; debug = <1>; }; };把之前关闭的显示输出重新打开
&disp { disp_init_enable = <1>; ...... } &lcd0 { lcd_used = <1>; ...... } &hdmi { hdmi_used = <1>; ...... }配置内核
进入
kernel_menuconfig，开启DISP Driver Support(sunxi-disp2)输出，并选择面板驱动。Device Drivers ---> Graphics support ---> Frame buffer Devices ---> <*> Support for frame buffer devices ---> Video support for sunxi ---> <*> DISP Driver Support(sunxi-disp2) <*> HDMI2.0 Driver Support(sunxi-disp2) HDMI2.0 PHY SELECT. (Allwinner PHY) ---> LCD panels select ---> [*] LCD support ST7701S RGB panel [*] Staging drivers ---> <*> Support for small TFT LCD display modules ---> <*> FB driver for the ST7789V LCD Controller在
menuconfig里将内核模块重新打开。Kernel modules ---> Video Support ---> <*> kmod-sunxi-disp....................................... sunxi-disp support <*> kmod-sunxi-g2d......................................... sunxi-g2d support <*> kmod-sunxi-hdmi....................................... sunxi-hdmi support <*> kmod-sunxi-uvc......................................... sunxi-uvc support编译，打包，测试。这里使用
ffmpeg进行双屏播放badapple.mp4
附录：部分设备树完整参考（配置双屏后，HDMI禁用了）
&pio { ...前略... spdif_pins_b: spdif_sleep@0 { pins = "PB0"; function = "io_disabled"; drive-strength = <20>; bias-disable; }; spi0_pins_a: spi0@0 { pins = "PC2", "PC4"; /*clk mosi*/ function = "spi0"; drive-strength = <10>; }; spi0_pins_b: spi0@1 { pins = "PC3"; function = "spi0"; drive-strength = <10>; bias-pull-up; // only CS should be pulled up }; spi1_pins_a: spi1@0 { pins = "PD11", "PD12", "PD13","PD14", "PD15"; /*clk mosi miso hold wp*/ function = "spi1"; drive-strength = <10>; }; spi1_pins_b: spi1@1 { pins = "PD10"; function = "spi1"; drive-strength = <10>; bias-pull-up; // only CS should be pulled up }; spi1_pins_c: spi1@2 { pins = "PD10", "PD11", "PD12", "PD13","PD14", "PD15"; function = "gpio_in"; drive-strength = <10>; }; ledc_pins_a: ledc@0 { pins = "PC0"; function = "ledc"; drive-strength = <10>; }; ledc_pins_b: ledc@1 { pins = "PC0"; function = "gpio_in"; }; ...后略... }； &spi0 { clock-frequency = <100000000>; pinctrl-0 = <&spi0_pins_a &spi0_pins_b>; status = "okay"; st7789v@0 { status = "okay"; compatible = "sitronix,st7789v"; reg = <0>; spi-max-frequency = <32000000>; rotate = <90>; rgb; fps = <30>; buswidth = <8>; reset = <&pio PC 6 GPIO_ACTIVE_LOW>; dc = <&pio PC 5 GPIO_ACTIVE_LOW>; // led = <&pio PD 18 GPIO_ACTIVE_HIGH>; debug = <1>; }; }; /*---------------------------------------------------------------------------------- disp init configuration disp_mode (0:screen0<screen0,fb0>) screenx_output_type (0:none; 1:lcd; 2:tv; 3:hdmi;5:vdpo) screenx_output_mode (used for hdmi output, 0:480i 1:576i 2:480p 3:576p 4:720p50) (5:720p60 6:1080i50 7:1080i60 8:1080p24 9:1080p50 10:1080p60) screenx_output_format (for hdmi, 0:RGB 1:yuv444 2:yuv422 3:yuv420) screenx_output_bits (for hdmi, 0:8bit 1:10bit 2:12bit 2:16bit) screenx_output_eotf (for hdmi, 0:reserve 4:SDR 16:HDR10 18:HLG) screenx_output_cs (for hdmi, 0:undefined 257:BT709 260:BT601 263:BT2020) screenx_output_dvi_hdmi (for hdmi, 0:undefined 1:dvi mode 2:hdmi mode) screen0_output_range (for hdmi, 0:default 1:full 2:limited) screen0_output_scan (for hdmi, 0:no data 1:overscan 2:underscan) screen0_output_aspect_ratio (for hdmi, 8-same as original picture 9-4:3 10-16:9 11-14:9) fbx format (4:RGB655 5:RGB565 6:RGB556 7:ARGB1555 8:RGBA5551 9:RGB888 10:ARGB8888 12:ARGB4444) fbx pixel sequence (0:ARGB 1:BGRA 2:ABGR 3:RGBA) fb0_scaler_mode_enable(scaler mode enable, used FE) fbx_width,fbx_height (framebuffer horizontal/vertical pixels, fix to output resolution while equal 0) lcdx_backlight (lcd init backlight,the range:[0,256],default:197 lcdx_yy (lcd init screen bright/contrast/saturation/hue, value:0~100, default:50/50/57/50) lcd0_contrast (LCD contrast, 0~100) lcd0_saturation (LCD saturation, 0~100) lcd0_hue (LCD hue, 0~100) framebuffer software rotation setting: disp_rotation_used: (0:disable; 1:enable,you must set fbX_width to lcd_y, set fbX_height to lcd_x) degreeX: (X:screen index; 0:0 degree; 1:90 degree; 3:270 degree) degreeX_Y: (X:screen index; Y:layer index 0~15; 0:0 degree; 1:90 degree; 3:270 degree) devX_output_type : config output type in bootGUI framework in UBOOT-2018. (0:none; 1:lcd; 2:tv; 4:hdmi;) devX_output_mode : config output resolution(see include/video/sunxi_display2.h) of bootGUI framework in UBOOT-2018 devX_screen_id : config display index of bootGUI framework in UBOOT-2018 devX_do_hpd : whether do hpd detectation or not in UBOOT-2018 chn_cfg_mode : Hardware DE channel allocation config. 0:single display with 6 channel, 1:dual display with 4 channel in main display and 2 channel in second display, 2:dual display with 3 channel in main display and 3 channel in second in display. ----------------------------------------------------------------------------------*/ &disp { disp_init_enable = <1>; disp_mode = <0>; screen0_output_type = <1>; screen0_output_mode = <4>; screen1_output_type = <3>; screen1_output_mode = <10>; screen1_output_format = <0>; screen1_output_bits = <0>; screen1_output_eotf = <4>; screen1_output_cs = <257>; screen1_output_dvi_hdmi = <2>; screen1_output_range = <2>; screen1_output_scan = <0>; screen1_output_aspect_ratio = <8>; dev0_output_type = <1>; dev0_output_mode = <4>; dev0_screen_id = <0>; dev0_do_hpd = <0>; dev1_output_type = <4>; dev1_output_mode = <10>; dev1_screen_id = <1>; dev1_do_hpd = <1>; def_output_dev = <0>; hdmi_mode_check = <1>; fb0_format = <0>; fb0_width = <0>; fb0_height = <0>; fb1_format = <0>; fb1_width = <0>; fb1_height = <0>; chn_cfg_mode = <1>; disp_para_zone = <1>; /*VCC-LCD*/ /* dc1sw-supply = <®_dc1sw>;*/ /*VCC-DSI*/ /* eldo3-supply = <®_eldo3>;*/ /*VCC-PD*/ /* dcdc1-supply = <®_dcdc1>;*/ }; /*---------------------------------------------------------------------------------- ;lcd0 configuration ;lcd_if: 0:hv(sync+de); 1:8080; 2:ttl; 3:lvds; 4:dsi; 5:edp; 6:extend dsi ;lcd_hv_if 0:Parallel RGB; 8:Serial RGB; 10:Dummy RGB; 11: RGB Dummy;12:CCIR656 ;lcd_hv_clk_phase 0:0 degree;1:90 degree;2:180 degree;3:270 degree ;lcd_hv_sync_polarity 0:vs low,hs low; 1:vs high,hslow; 2:vs low,hs high; 3:vs high,hs high ;lcd_hv_syuv_seq 0:YUYV; 1:YVYU; 2:UYVY; 3:VYUY ;lcd_cpu_if 0:18bit/1 cycle parallel(RGB666); 4:16bit/1cycle parallel (RGB565) ; 6:18bit/3 cycle parallel(RGB666); 7:16bit/2cycle parallel (RGB565) ;lcd_cpu_te 0:frame auto trigger; 1:frame triggered by te rising edge; 2:frame triggered by te falling edge; ;lcd_dsi_if 0:video mode; 1: Command mode; 2:video burst mode ;lcd_dsi_te 0:frame auto trigger; 1:frame triggered by te rising edge; 2:frame triggered by te falling edge; ;lcd_x: lcd horizontal resolution ;lcd_y: lcd vertical resolution ;lcd_width: width of lcd in mm ;lcd_height: height of lcd in mm ;lcd_dclk_freq: in MHZ unit ;lcd_pwm_freq: in HZ unit ;lcd_pwm_pol: lcd backlight PWM polarity ;lcd_pwm_max_limit lcd backlight PWM max limit(<=255) ;lcd_hbp: hsync back porch(pixel) + hsync plus width(pixel); ;lcd_ht: hsync total cycle(pixel) ;lcd_vbp: vsync back porch(line) + vysnc plus width(line) ;lcd_vt: vysnc total cycle(line) ;lcd_hspw: hsync plus width(pixel) ;lcd_vspw: vysnc plus width(pixel) ;lcd_lvds_if: 0:single link; 1:dual link ;lcd_lvds_colordepth: 0:8bit; 1:6bit ;lcd_lvds_mode: 0:NS mode; 1:JEIDA mode ;lcd_frm: 0:disable; 1:enable rgb666 dither; 2:enable rgb656 dither ;lcd_io_phase: 0:noraml; 1:intert phase(0~3bit: vsync phase; 4~7bit:hsync phase; ; 8~11bit:dclk phase; 12~15bit:de phase) ;lcd_gamma_en lcd gamma correction enable ;lcd_bright_curve_en lcd bright curve correction enable ;lcd_cmap_en lcd color map function enable ;deu_mode 0:smoll lcd screen; 1:large lcd screen(larger than 10inch) ;lcdgamma4iep: Smart Backlight parameter, lcd gamma vale * 10; ; decrease it while lcd is not bright enough; increase while lcd is too bright ;smart_color 90:normal lcd screen 65:retina lcd screen(9.7inch) ;Pin setting for special function ie.LVDS, RGB data or vsync ; name(donot care) = port:PD12<pin function><pull up or pull down><drive ability><output level> ;Pin setting for gpio: ; lcd_gpio_X = port:PD12<pin function><pull up or pull down><drive ability><output level> ;Pin setting for backlight enable pin ; lcd_bl_en = port:PD12<pin function><pull up or pull down><drive ability><output level> ;fsync setting, pulse to csi ;lcd_fsync_en (0:disable fsync,1:enable) ;lcd_fsync_act_time (active time of fsync, unit:pixel) ;lcd_fsync_dis_time (disactive time of fsync, unit:pixel) ;lcd_fsync_pol (0:positive;1:negative) ;gpio config: <&pio for cpu or &r_pio for cpus, port, port num, pio function, pull up or pull down(default 0), driver level(default 1), data> ;For dual link lvds: use lvds2link_pins_a and lvds2link_pins_b instead ;For rgb24: use rgb24_pins_a and rgb24_pins_b instead ;For lvds1: use lvds1_pins_a and lvds1_pins_b instead ;For lvds0: use lvds0_pins_a and lvds0_pins_b instead ;----------------------------------------------------------------------------------*/ &lcd0 { lcd_used = <1>; lcd_driver_name = "st7701s_rgb"; lcd_if = <0>; lcd_hv_if = <0>; lcd_width = <70>; lcd_height = <72>; lcd_x = <480>; lcd_y = <480>; lcd_dclk_freq = <19>; lcd_hbp = <60>; lcd_ht = <612>; lcd_hspw = <12>; lcd_vbp = <18>; lcd_vt = <520>; lcd_vspw = <4>; lcd_backlight = <50>; lcd_pwm_used = <1>; lcd_pwm_ch = <7>; lcd_pwm_freq = <20000>; lcd_pwm_pol = <1>; lcd_bright_curve_en = <0>; lcd_frm = <1>; lcd_io_phase = <0x0000>; lcd_gamma_en = <0>; lcd_cmap_en = <0>; lcd_hv_clk_phase= <0>; lcd_hv_sync_polarity= <0>; lcd_rb_swap = <0>; lcd_power = "vcc-lcd"; lcd_pin_power = "vcc-pd"; lcd_gpio_0 = <&pio PG 13 GPIO_ACTIVE_HIGH>; lcd_gpio_1 = <&pio PE 14 GPIO_ACTIVE_HIGH>; lcd_gpio_2 = <&pio PE 12 GPIO_ACTIVE_HIGH>; lcd_gpio_3 = <&pio PE 15 GPIO_ACTIVE_HIGH>; pinctrl-0 = <&rgb18_pins_a>; pinctrl-1 = <&rgb18_pins_b>; }; &hdmi { hdmi_used = <0>; hdmi_power_cnt = <0>; hdmi_cts_compatibility = <1>; hdmi_hdcp_enable = <1>; hdmi_hdcp22_enable = <0>; hdmi_cec_support = <1>; hdmi_cec_super_standby = <0>; ddc_en_io_ctrl = <0>; power_io_ctrl = <0>; };
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Reply: Porject Yosemite - 基于全志V853的开发板posted in V853
发一个内存模板
测试DDR3 1866没问题，PCB是从LCEDA导出的，JLC打板子选择2313
注意：
- 因格式和图元的设计不一致，格式转换会有一定的差异，导出后请务必在 Altium Designer 仔细检查。
- 导出前请务必阅读： 导出 Altium Designer注意事项与免责声明
- 不承担因导出差异导致的任何生产损失。
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芒果派 MQ Pro，MQ 的板级配置文件posted in D1-H/D1s
下载：
同时有D1-H与D1s的配置文件。
直接复制进 tina-d1-h 就可以了
实时更新仓库（上面那个tar不想打包了，之后更新丢github上）
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【开源】YuzukiRuler 随身Linux小尺子posted in 全志方案讨论区
YuzukiRuler
YuzukiRuler 随身Linux小尺子，板载UART和OTG，还有一个1.14小屏幕，支持2.4G Wi-Fi网上冲浪
来点图片
软件适配
Linux Kernel 5.4.180 主线内核
Uboot 2020.07
Buildroot rootfs硬件开源地址
https://oshwhub.com/GloomyGhost/yuzukiruler
SDK 相关
SDK下载地址：github.com/YuzukiHD/Buildroot-YuzukiSBC
SDK开发说明：yuzukihd.gloomyghost.com/Buildroot-YuzukiSBC最新固件下载
github.com/YuzukiHD/Buildroot-YuzukiSBC/releases/latest
用户名：root
密码：无
固件默认输出Console，有其他需要请自行修改固件
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Reply: 请问sys_config.fex与board.dts是什么关系posted in V853
最开始没有dts，用的是fex描述各种配置。后来有了设备树就分开了。现在fex大多数用于boot0的配置，基本不参与设备树，但是也参与部分。fex的优先级高于设备树
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【开源】YuzukiNezha D1s 核心板 Mini-PICE 核心板posted in D1-H/D1s
经历了期末考试挂科风险、板子刚寄到学校我就回家了、疫情元器件停止派送等一些列人情世故后，它终于来了：YuzukiNezha D1s
特点
- Mini PCIE版型，引出接口，可以自由搭配以太网，RGB屏、MIPI屏底板。不需要排线连接转接。
- 板载电源树、USB接口、TP排线接口、SPI与TF卡槽。PG11引出一颗LED，没有底板也能愉快点灯。
- 四层板设计、工艺不需要加钱（最好花钱沉个金）、0402优雅阻容。
- 板载WiFi模块,可以焊接各种适配模块。
- LCEDA格式，OSHWHUB与Github开源。协议CERN-OHL-P
来点图
正面图
背面图
三兄弟
目前问题（杀鸽
- TF卡槽买错了还没有验证
- Audio部分被砍了（主要是期末考试没时间画了
- WiFi 模块的配置电阻还没给，只能用特定型号的模块
- 没时间画丝印（（（
- AWOL LOGO 反了（（（
验证xfel
关于TF卡槽
以为一模一样
然后背刺
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A133 编译安卓固件posted in 全志方案讨论区
先编译U-Boot
cd brandy/brandy-2.0 ./build.sh -p sun50iw10p1设置U-Boot
cd u-boot-2018 make menuconfig编译Kernel
./build.sh config ./build.sh配置Kernel
cd kernel/linux5.4 make menuconfig编译安卓
source build/envsetup.sh lunch extract-bsp make pack
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OpenixCard - 在 Linux 系统刷写全志镜像到 SD 卡posted in 编译和烧写问题专区
远古的坑了，最近有时间终于填了下。
线刷在Windows上有PhoenixSuit，在Linux上有LiveSuit，刷写都很方便。但是到了卡刷就寄了，只有一个Windows下的PhoenixCard，在Linux下刷写很头疼。于是写了这个小东西。
功能：
- 在 Linux 解包 Tina 镜像
- 将 Tina 镜像转换为标准的镜像，转换后的镜像可以使用DD、USB Image Tool、Win32diskimager、Etcher刷写。方便分发。
- 更多功能咕咕中....
开源地址
https://github.com/YuzukiTsuru/OpenixCard
视频：转换全志的镜像成为标准镜像并用Etcher刷写。
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Reply: 【开源】YuzukiNezha D1s 核心板 Mini-PICE 核心板posted in D1-H/D1s
修复SD卡槽错误，优化走线。
跟F1C200S 核心板合影
启动系统的样子
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Reply: V831 的 Tina 启动没有 Uboot 与 Linux 日志输出，dmesg有输出posted in 全志方案讨论区
修复叻，手残打开了Boot Time Optimization
# # Boot Time Optimization # # CONFIG_BOOT_TIME_OPTIMIZATION is not set
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Reply: 芒果派 麻雀 Dual T113使用Buildroot一键构建posted in 全志方案讨论区
测试镜像：
百度云：链接：https://pan.baidu.com/s/1dPSaKJQrOMy8X1Xs_604Dw 提取码：awol
奶牛快传：https://cowtransfer.com/s/76711e52ad304f 或 打开【奶牛快传】cowtransfer.com 使用传输口令：gl9jyq 提取；串口是PE2，PE3
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自制V831小相机适配 i80 LCD 显示屏posted in 全志方案讨论区
V831没有RGB也没有MIPI，正好手上有几片i80 MCU屏幕可以用（320*480 3.5寸的，15块钱一片）
电路部分
屏幕部分：
主控部分：
没啥好说的，照着Sipeed的抄就行了
配置设备树
lcd0: lcd0@01c0c000 { lcd_used = <1>; lcd_driver_name = "ili9481"; lcd_x = <320>; lcd_y = <480>; lcd_width = <108>; lcd_height = <64>; lcd_dclk_freq = <5>; lcd_pwm_used = <0>; lcd_hbp = <20>; lcd_ht = <382>; lcd_hspw = <2>; lcd_vbp = <2>; // 320 lcd_vt = <486>; // 320 lcd_vspw = <2>; lcd_if = <1>; lcd_frm = <2>; lcd_cpu_mode = <1>; lcd_cpu_te = <0>; lcd_cpu_if = <14>; lcd_io_phase = <0x0000>; lcdgamma4iep = <22>; lcd_gamma_en = <0>; lcd_cmap_en = <0>; lcd_bright_curve_en = <0>; lcd_rb_swap = <0>; lcd_gpio_0 = <&pio PH 5 1 0 3 0>; /* rst */ lcd_gpio_1 = <&pio PD 21 1 0 3 0>; /* cs */ lcd_bl_en = <&pio PH 6 1 0 3 1>; pinctrl-0 = <&rgb8_pins_a>; pinctrl-1 = <&rgb8_pins_b>; };因为这里用的是
Kernel刷屏，所以就不配uboot的了驱动
然后找大佬鼠嫖驱动，放到
lichee/linux-4.9/drivers/video/fbdev/sunxi/disp2/disp/lcd/文件夹下。编辑
lichee/linux-4.9/drivers/video/fbdev/sunxi/disp2/disp/lcd/panels.c，找一个顺眼的地方加一下配置。#ifdef CONFIG_LCD_SUPPORT_ILI9481 &ili9481_panel, #endif编辑
lichee/linux-4.9/drivers/video/fbdev/sunxi/disp2/disp/lcd/panels.h，找一个顺眼的地方加一下配置。#ifdef CONFIG_LCD_SUPPORT_ILI9481 extern struct __lcd_panel ili9481_panel; #endif编辑
lichee/linux-4.9/drivers/video/fbdev/sunxi/disp2/disp/lcd/Kconfig，找一个顺眼的地方加一下配置。config LCD_SUPPORT_ILI9481 bool "LCD support ili9481 panel" default n ---help--- If you want to support ili9481 panel for display driver, select it.编辑
lichee/linux-4.9/drivers/video/fbdev/sunxi/disp2/disp/Makefile，找一个顺眼的地方加一下配置。disp-$(CONFIG_LCD_SUPPORT_ILI9481) += lcd/ili9481.o再打开
m kernel_menuconfigDevice Drivers ---> Graphics support ---> Frame buffer Devices ---> Video support for sunxi ---> LCD panels select ---> [*] LCD support ili9481 panel
保存，编译kernel打包就好了。
启动系统
刷卡，启动系统，可以看到屏幕背光已经亮了。
测试一下
echo 1 > sys/class/disp/disp/attr/colorbar
驱动和配置已经上传Github，自取
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Reply: 请问麻雀d1s用tina-sdk2.0打开 printk time，内核启动log还是没时间戳显示，如何解决？posted in D1-H/D1s
YuzukiNezha D1s 的启动截图，Tina 2.0
修复方法：
打开lichee/linux-5.4/kernel/printk/printk.c修改
static size_t print_prefix(const struct printk_log *msg, bool syslog, bool time, char *buf)函数static size_t print_prefix(const struct printk_log *msg, bool syslog, bool time, char *buf) { size_t len = 0; if (syslog) len = print_syslog((msg->facility << 3) | msg->level, buf); if (time) len += print_time(msg->ts_nsec, buf + len); len += print_time(msg->ts_nsec, buf + len); len += print_caller(msg->caller_id, buf + len); if (IS_ENABLED(CONFIG_PRINTK_CALLER) || time) { buf[len++] = ' '; buf[len] = '\0'; } return len; }
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Reply: 超级萌新学晕哥也整了一台“台电” P85 TLA016 平板电脑posted in 全志方案讨论区
串口可以输入了。抓到完整的设备树
/ { model = "sun50iw10"; compatible = "allwinner,a100", "arm,sun50iw10p1"; interrupt-parent = <0x00000001>; #address-cells = <0x00000002>; #size-cells = <0x00000002>; clocks { compatible = "allwinner,clk-init"; device_type = "clocks"; #address-cells = <0x00000002>; #size-cells = <0x00000002>; ranges; reg = <0x00000000 0x03001000 0x00000000 0x00001000 0x00000000 0x07010000 0x00000000 0x00000400 0x00000000 0x07000000 0x00000000 0x00000004>; losc { #clock-cells = <0x00000000>; compatible = "allwinner,fixed-clock"; clock-frequency = <0x00008000>; clock-output-names = "losc"; phandle = <0x000000b3>; }; iosc { #clock-cells = <0x00000000>; compatible = "allwinner,fixed-clock"; clock-frequency = "", ".$"; clock-output-names = "iosc"; phandle = <0x000000b4>; }; hosc { #clock-cells = <0x00000000>; compatible = "allwinner,fixed-clock"; clock-frequency = <0x016e3600>; clock-output-names = "hosc"; phandle = <0x0000000a>; }; osc48m { #clock-cells = <0x00000000>; compatible = "allwinner,fixed-clock"; clock-frequency = <0x02dc6c00>; clock-output-names = "osc48m"; phandle = <0x0000000b>; }; hoscdiv32k { #clock-cells = <0x00000000>; compatible = "allwinner,fixed-clock"; clock-frequency = <0x00008000>; clock-output-names = "hoscdiv32k"; phandle = <0x000000b5>; }; pll_periph0div25m { #clock-cells = <0x00000000>; compatible = "allwinner,fixed-clock"; clock-frequency = <0x017d7840>; clock-output-names = "pll_periph0div25m"; phandle = <0x000000b6>; }; pll_cpu { #clock-cells = <0x00000000>; compatible = "allwinner,pll-clock"; lock-mode = "new"; clock-output-names = "pll_cpu"; phandle = <0x000000b7>; }; pll_ddr { #clock-cells = <0x00000000>; compatible = "allwinner,pll-clock"; lock-mode = "new"; clock-output-names = "pll_ddr"; phandle = <0x000000b8>; }; pll_periph0 { #clock-cells = <0x00000000>; compatible = "allwinner,pll-clock"; assigned-clock-rates = "#.F"; lock-mode = "new"; clock-output-names = "pll_periph0"; phandle = <0x00000006>; }; pll_periph1 { #clock-cells = <0x00000000>; compatible = "allwinner,pll-clock"; assigned-clock-rates = "#.F"; lock-mode = "new"; clock-output-names = "pll_periph1"; phandle = <0x00000007>; }; pll_gpu { #clock-cells = <0x00000000>; compatible = "allwinner,pll-clock"; lock-mode = "new"; clock-output-names = "pll_gpu"; phandle = <0x000000b9>; }; pll_video0x4 { #clock-cells = <0x00000000>; compatible = "allwinner,pll-clock"; lock-mode = "new"; clock-output-names = "pll_video0x4"; phandle = <0x00000008>; }; pll_video1x4 { #clock-cells = <0x00000000>; compatible = "allwinner,pll-clock"; lock-mode = "new"; clock-output-names = "pll_video1x4"; phandle = <0x00000009>; }; pll_video2 { #clock-cells = <0x00000000>; compatible = "allwinner,pll-clock"; lock-mode = "new"; assigned-clocks = <0x00000002>; assigned-clock-rates = <0x1406f400>; clock-output-names = "pll_video2"; phandle = <0x00000002>; }; pll_video3 { #clock-cells = <0x00000000>; compatible = "allwinner,pll-clock"; lock-mode = "new"; assigned-clocks = <0x00000003>; assigned-clock-rates = <0x11e1a300>; clock-output-names = "pll_video3"; phandle = <0x00000003>; }; pll_ve { #clock-cells = <0x00000000>; compatible = "allwinner,pll-clock"; device_type = "clk_pll_ve"; lock-mode = "new"; clock-output-names = "pll_ve"; phandle = <0x000000ba>; }; pll_com { #clock-cells = <0x00000000>; compatible = "allwinner,pll-clock"; assigned-clocks = <0x00000004>; assigned-clock-rates = "#.F"; lock-mode = "new"; clock-output-names = "pll_com"; phandle = <0x00000004>; }; pll_audiox4 { #clock-cells = <0x00000000>; compatible = "allwinner,pll-clock"; assigned-clocks = <0x00000005>; assigned-clock-rates = <0x05dc0000>; lock-mode = "new"; clock-output-names = "pll_audiox4"; phandle = <0x00000005>; }; pll_periph0x2 { #clock-cells = <0x00000000>; compatible = "allwinner,fixed-factor-clock"; clocks = <0x00000006>; clock-mult = <0x00000002>; clock-div = <0x00000001>; clock-output-names = "pll_periph0x2"; phandle = <0x0000000c>; }; pll_periph0x4 { #clock-cells = <0x00000000>; compatible = "allwinner,fixed-factor-clock"; clocks = <0x00000006>; clock-mult = <0x00000004>; clock-div = <0x00000001>; clock-output-names = "pll_periph0x4"; phandle = <0x000000bb>; }; periph32k { #clock-cells = <0x00000000>; compatible = "allwinner,fixed-factor-clock"; clocks = <0x00000006>; clock-mult = <0x00000002>; clock-div = <0x00008f0d>; clock-output-names = "periph32k"; phandle = <0x000000bc>; }; pll_periph1x2 { #clock-cells = <0x00000000>; compatible = "allwinner,fixed-factor-clock"; clocks = <0x00000007>; clock-mult = <0x00000002>; clock-div = <0x00000001>; clock-output-names = "pll_periph1x2"; phandle = <0x000000bd>; }; pll_comdiv5 { #clock-cells = <0x00000000>; compatible = "allwinner,fixed-factor-clock"; clocks = <0x00000004>; clock-mult = <0x00000001>; clock-div = <0x00000005>; clock-output-names = "pll_comdiv5"; phandle = <0x000000be>; }; pll_audiox8 { #clock-cells = <0x00000000>; compatible = "allwinner,fixed-factor-clock"; clocks = <0x00000005>; clock-mult = <0x00000002>; clock-div = <0x00000001>; clock-output-names = "pll_audiox8"; phandle = <0x000000bf>; }; pll_audio { #clock-cells = <0x00000000>; compatible = "allwinner,fixed-factor-clock"; clocks = <0x00000005>; clock-mult = <0x00000001>; clock-div = <0x00000004>; clock-output-names = "pll_audio"; phandle = <0x000000c0>; }; pll_audiox2 { #clock-cells = <0x00000000>; compatible = "allwinner,fixed-factor-clock"; clocks = <0x00000005>; clock-mult = <0x00000001>; clock-div = <0x00000002>; clock-output-names = "pll_audiox2"; phandle = <0x000000c1>; }; pll_video0 { #clock-cells = <0x00000000>; compatible = "allwinner,fixed-factor-clock"; clocks = <0x00000008>; clock-mult = <0x00000001>; clock-div = <0x00000004>; clock-output-names = "pll_video0"; phandle = <0x000000c2>; }; pll_video0x2 { #clock-cells = <0x00000000>; compatible = "allwinner,fixed-factor-clock"; clocks = <0x00000008>; clock-mult = <0x00000001>; clock-div = <0x00000002>; clock-output-names = "pll_video0x2"; phandle = <0x000000c3>; }; pll_video1 { #clock-cells = <0x00000000>; compatible = "allwinner,fixed-factor-clock"; clocks = <0x00000009>; clock-mult = <0x00000001>; clock-div = <0x00000004>; clock-output-names = "pll_video1"; phandle = <0x000000c4>; }; pll_video1x2 { #clock-cells = <0x00000000>; compatible = "allwinner,fixed-factor-clock"; clocks = <0x00000009>; clock-mult = <0x00000001>; clock-div = <0x00000002>; clock-output-names = "pll_video1x2"; phandle = <0x000000c5>; }; pll_video2x2 { #clock-cells = <0x00000000>; compatible = "allwinner,fixed-factor-clock"; clocks = <0x00000002>; clock-mult = <0x00000002>; clock-div = <0x00000001>; clock-output-names = "pll_video2x2"; phandle = <0x000000c6>; }; pll_video2x4 { #clock-cells = <0x00000000>; compatible = "allwinner,fixed-factor-clock"; clocks = <0x00000002>; clock-mult = <0x00000004>; clock-div = <0x00000001>; clock-output-names = "pll_video2x4"; phandle = <0x000000c7>; }; pll_video3x2 { #clock-cells = <0x00000000>; compatible = "allwinner,fixed-factor-clock"; clocks = <0x00000003>; clock-mult = <0x00000002>; clock-div = <0x00000001>; clock-output-names = "pll_video3x2"; phandle = <0x000000c8>; }; pll_video3x4 { #clock-cells = <0x00000000>; compatible = "allwinner,fixed-factor-clock"; clocks = <0x00000003>; clock-mult = <0x00000004>; clock-div = <0x00000001>; clock-output-names = "pll_video3x4"; phandle = <0x000000c9>; }; hoscd2 { #clock-cells = <0x00000000>; compatible = "allwinner,fixed-factor-clock"; clocks = <0x0000000a>; clock-mult = <0x00000001>; clock-div = <0x00000002>; clock-output-names = "hoscd2"; phandle = <0x000000ca>; }; osc48md4 { #clock-cells = <0x00000000>; compatible = "allwinner,fixed-factor-clock"; clocks = <0x0000000b>; clock-mult = <0x00000001>; clock-div = <0x00000004>; clock-output-names = "osc48md4"; phandle = <0x000000cb>; }; pll_periph0d6 { #clock-cells = <0x00000000>; compatible = "allwinner,fixed-factor-clock"; clocks = <0x00000006>; clock-mult = <0x00000001>; clock-div = <0x00000006>; clock-output-names = "pll_periph0d6"; phandle = <0x000000cc>; }; cpu { #clock-cells = <0x00000000>; compatible = "allwinner,cpu-clock"; clock-output-names = "cpu"; phandle = <0x000000cd>; }; axi { #clock-cells = <0x00000000>; compatible = "allwinner,periph-clock"; clock-output-names = "axi"; phandle = <0x000000ce>; }; cpuapb { #clock-cells = <0x00000000>; compatible = "allwinner,periph-clock"; clock-output-names = "cpuapb"; phandle = <0x000000cf>; }; psi { #clock-cells = <0x00000000>; compatible = "allwinner,periph-clock"; clock-output-names = "psi"; phandle = <0x000000d0>; }; ahb1 { #clock-cells = <0x00000000>; compatible = "allwinner,periph-clock"; clock-output-names = "ahb1"; phandle = <0x000000d1>; }; ahb2 { #clock-cells = <0x00000000>; compatible = "allwinner,periph-clock"; clock-output-names = "ahb2"; phandle = <0x000000d2>; }; ahb3 { #clock-cells = <0x00000000>; compatible = "allwinner,periph-clock"; clock-output-names = "ahb3"; phandle = <0x000000d3>; }; apb1 { #clock-cells = <0x00000000>; compatible = "allwinner,periph-clock"; clock-output-names = "apb1"; phandle = <0x000000d4>; }; apb2 { #clock-cells = <0x00000000>; compatible = "allwinner,periph-clock"; clock-output-names = "apb2"; phandle = <0x000000d5>; }; de0 { #clock-cells = <0x00000000>; compatible = "allwinner,periph-clock"; assigned-clock-parents = <0x0000000c>; assigned-clock-rates = <0x11e1a300>; assigned-clocks = <0x0000000d>; clock-output-names = "de0"; phandle = <0x0000000d>; }; de1 { #clock-cells = <0x00000000>; compatible = "allwinner,periph-clock"; assigned-clock-parents = <0x0000000c>; assigned-clock-rates = <0x11e1a300>; assigned-clocks = <0x0000000e>; clock-output-names = "de1"; phandle = <0x0000000e>; }; g2d { #clock-cells = <0x00000000>; compatible = "allwinner,periph-clock"; clock-output-names = "g2d"; assigned-clock-parents = <0x0000000c>; assigned-clock-rates = <0x11e1a300>; assigned-clocks = <0x0000000f>; phandle = <0x0000000f>; }; ee { #clock-cells = <0x00000000>; compatible = "allwinner,periph-clock"; assigned-clock-parents = <0x0000000c>; assigned-clock-rates = <0x11e1a300>; assigned-clocks = <0x00000010>; clock-output-names = "ee"; phandle = <0x00000010>; }; panel { #clock-cells = <0x00000000>; compatible = "allwinner,periph-clock"; assigned-clock-parents = <0x00000002>; assigned-clock-rates = <0x01c9c380>; assigned-clocks = <0x00000011>; clock-output-names = "panel"; phandle = <0x00000011>; }; gpu { #clock-cells = <0x00000000>; compatible = "allwinner,periph-clock"; clock-output-names = "gpu"; phandle = <0x000000d6>; }; ce { #clock-cells = <0x00000000>; compatible = "allwinner,periph-clock"; clock-output-names = "ce"; phandle = <0x000000d7>; }; ve { #clock-cells = <0x00000000>; compatible = "allwinner,periph-clock"; clock-output-names = "ve"; phandle = <0x000000d8>; }; dma { #clock-cells = <0x00000000>; compatible = "allwinner,periph-clock"; clock-output-names = "dma"; phandle = <0x000000d9>; }; msgbox { #clock-cells = <0x00000000>; compatible = "allwinner,periph-clock"; clock-output-names = "msgbox"; phandle = <0x000000da>; }; hwspinlock_rst { #clock-cells = <0x00000000>; compatible = "allwinner,periph-clock"; clock-output-names = "hwspinlock_rst"; phandle = <0x000000db>; }; hwspinlock_bus { #clock-cells = <0x00000000>; compatible = "allwinner,periph-clock"; clock-output-names = "hwspinlock_bus"; phandle = <0x000000dc>; }; hstimer { #clock-cells = <0x00000000>; compatible = "allwinner,periph-clock"; clock-output-names = "hstimer"; phandle = <0x000000dd>; }; avs { #clock-cells = <0x00000000>; compatible = "allwinner,periph-clock"; clock-output-names = "avs"; phandle = <0x000000de>; }; dbgsys { #clock-cells = <0x00000000>; compatible = "allwinner,periph-clock"; clock-output-names = "dbgsys"; phandle = <0x000000df>; }; pwm { #clock-cells = <0x00000000>; compatible = "allwinner,periph-clock"; clock-output-names = "pwm"; phandle = <0x000000e0>; }; iommu { #clock-cells = <0x00000000>; compatible = "allwinner,periph-clock"; clock-output-names = "iommu"; phandle = <0x000000e1>; }; nand0 { #clock-cells = <0x00000000>; compatible = "allwinner,periph-clock"; clock-output-names = "nand0"; phandle = <0x000000e2>; }; nand1 { #clock-cells = <0x00000000>; compatible = "allwinner,periph-clock"; clock-output-names = "nand1"; phandle = <0x000000e3>; }; sdmmc0_mod { #clock-cells = <0x00000000>; compatible = "allwinner,periph-clock"; clock-output-names = "sdmmc0_mod"; phandle = <0x000000e4>; }; sdmmc0_bus { #clock-cells = <0x00000000>; compatible = "allwinner,periph-clock"; clock-output-names = "sdmmc0_bus"; phandle = <0x000000e5>; }; sdmmc0_rst { #clock-cells = <0x00000000>; compatible = "allwinner,periph-clock"; clock-output-names = "sdmmc0_rst"; phandle = <0x000000e6>; }; sdmmc1_mod { #clock-cells = <0x00000000>; compatible = "allwinner,periph-clock"; clock-output-names = "sdmmc1_mod"; phandle = <0x000000e7>; }; sdmmc1_bus { #clock-cells = <0x00000000>; compatible = "allwinner,periph-clock"; clock-output-names = "sdmmc1_bus"; phandle = <0x000000e8>; }; sdmmc1_rst { #clock-cells = <0x00000000>; compatible = "allwinner,periph-clock"; clock-output-names = "sdmmc1_rst"; phandle = <0x000000e9>; }; sdmmc2_mod { #clock-cells = <0x00000000>; compatible = "allwinner,periph-clock"; clock-output-names = "sdmmc2_mod"; phandle = <0x000000ea>; }; sdmmc2_bus { #clock-cells = <0x00000000>; compatible = "allwinner,periph-clock"; clock-output-names = "sdmmc2_bus"; phandle = <0x000000eb>; }; sdmmc2_rst { #clock-cells = <0x00000000>; compatible = "allwinner,periph-clock"; clock-output-names = "sdmmc2_rst"; phandle = <0x000000ec>; }; uart0 { #clock-cells = <0x00000000>; compatible = "allwinner,periph-clock"; clock-output-names = "uart0"; phandle = <0x000000ed>; }; uart1 { #clock-cells = <0x00000000>; compatible = "allwinner,periph-clock"; clock-output-names = "uart1"; phandle = <0x000000ee>; }; uart2 { #clock-cells = <0x00000000>; compatible = "allwinner,periph-clock"; clock-output-names = "uart2"; phandle = <0x000000ef>; }; uart3 { #clock-cells = <0x00000000>; compatible = "allwinner,periph-clock"; clock-output-names = "uart3"; phandle = <0x000000f0>; }; uart4 { #clock-cells = <0x00000000>; compatible = "allwinner,periph-clock"; clock-output-names = "uart4"; phandle = <0x000000f1>; }; uart5 { #clock-cells = <0x00000000>; compatible = "allwinner,periph-clock"; clock-output-names = "uart5"; phandle = <0x000000f2>; }; uart6 { #clock-cells = <0x00000000>; compatible = "allwinner,periph-clock"; clock-output-names = "uart6"; phandle = <0x000000f3>; }; scr0 { #clock-cells = <0x00000000>; compatible = "allwinner,periph-clock"; clock-output-names = "scr0"; phandle = <0x000000f4>; }; gmac0_25m { #clock-cells = <0x00000000>; compatible = "allwinner,periph-clock"; clock-output-names = "gmac0_25m"; phandle = <0x000000f5>; }; gmac1_25m { #clock-cells = <0x00000000>; compatible = "allwinner,periph-clock"; clock-output-names = "gmac1_25m"; phandle = <0x000000f6>; }; gmac0 { #clock-cells = <0x00000000>; compatible = "allwinner,periph-clock"; clock-output-names = "gmac0"; phandle = <0x000000f7>; }; gmac1 { #clock-cells = <0x00000000>; compatible = "allwinner,periph-clock"; clock-output-names = "gmac1"; phandle = <0x000000f8>; }; gpadc { #clock-cells = <0x00000000>; compatible = "allwinner,periph-clock"; clock-output-names = "gpadc"; phandle = <0x000000f9>; }; irtx { #clock-cells = <0x00000000>; compatible = "allwinner,periph-clock"; clock-output-names = "irtx"; phandle = <0x000000fa>; }; ths { #clock-cells = <0x00000000>; compatible = "allwinner,periph-clock"; clock-output-names = "ths"; phandle = <0x000000fb>; }; i2s0 { #clock-cells = <0x00000000>; compatible = "allwinner,periph-clock"; clock-output-names = "i2s0"; phandle = <0x000000fc>; }; i2s1 { #clock-cells = <0x00000000>; compatible = "allwinner,periph-clock"; clock-output-names = "i2s1"; phandle = <0x000000fd>; }; i2s2 { #clock-cells = <0x00000000>; compatible = "allwinner,periph-clock"; clock-output-names = "i2s2"; phandle = <0x000000fe>; }; i2s3 { #clock-cells = <0x00000000>; compatible = "allwinner,periph-clock"; clock-output-names = "i2s3"; phandle = <0x000000ff>; }; spdif { #clock-cells = <0x00000000>; compatible = "allwinner,periph-clock"; clock-output-names = "spdif"; phandle = <0x00000100>; }; dmic { #clock-cells = <0x00000000>; compatible = "allwinner,periph-clock"; clock-output-names = "dmic"; phandle = <0x00000101>; }; codec_dac_1x { #clock-cells = <0x00000000>; compatible = "allwinner,periph-clock"; clock-output-names = "codec_dac_1x"; phandle = <0x00000102>; }; codec_adc_1x { #clock-cells = <0x00000000>; compatible = "allwinner,periph-clock"; clock-output-names = "codec_adc_1x"; phandle = <0x00000103>; }; codec_4x { #clock-cells = <0x00000000>; compatible = "allwinner,periph-clock"; clock-output-names = "codec_4x"; phandle = <0x00000104>; }; usbphy0 { #clock-cells = <0x00000000>; compatible = "allwinner,periph-clock"; clock-output-names = "usbphy0"; phandle = <0x00000105>; }; usbphy1 { #clock-cells = <0x00000000>; compatible = "allwinner,periph-clock"; clock-output-names = "usbphy1"; phandle = <0x00000106>; }; usbohci0 { #clock-cells = <0x00000000>; compatible = "allwinner,periph-clock"; clock-output-names = "usbohci0"; phandle = <0x00000107>; }; usbohci0_12m { #clock-cells = <0x00000000>; compatible = "allwinner,periph-clock"; clock-output-names = "usbohci0_12m"; phandle = <0x00000108>; }; usbohci1 { #clock-cells = <0x00000000>; compatible = "allwinner,periph-clock"; clock-output-names = "usbohci1"; phandle = <0x00000109>; }; usbohci1_12m { #clock-cells = <0x00000000>; compatible = "allwinner,periph-clock"; clock-output-names = "usbohci1_12m"; phandle = <0x0000010a>; }; usbehci0 { #clock-cells = <0x00000000>; compatible = "allwinner,periph-clock"; clock-output-names = "usbehci0"; phandle = <0x0000010b>; }; usbehci1 { #clock-cells = <0x00000000>; compatible = "allwinner,periph-clock"; clock-output-names = "usbehci1"; phandle = <0x0000010c>; }; usbotg { #clock-cells = <0x00000000>; compatible = "allwinner,periph-clock"; clock-output-names = "usbotg"; phandle = <0x0000010d>; }; display_top { #clock-cells = <0x00000000>; compatible = "allwinner,periph-clock"; clock-output-names = "display_top"; phandle = <0x00000092>; }; dpss_top0 { #clock-cells = <0x00000000>; compatible = "allwinner,periph-clock"; clock-output-names = "dpss_top0"; phandle = <0x00000093>; }; dpss_top1 { #clock-cells = <0x00000000>; compatible = "allwinner,periph-clock"; clock-output-names = "dpss_top1"; phandle = <0x00000094>; }; tcon_lcd0 { #clock-cells = <0x00000000>; compatible = "allwinner,periph-clock"; clock-output-names = "tcon_lcd0"; assigned-clocks = <0x00000012>; assigned-clock-parents = <0x00000008>; phandle = <0x00000012>; }; tcon_lcd1 { #clock-cells = <0x00000000>; compatible = "allwinner,periph-clock"; clock-output-names = "tcon_lcd1"; assigned-clocks = <0x00000013>; assigned-clock-parents = <0x00000009>; phandle = <0x00000013>; }; lvds { #clock-cells = <0x00000000>; compatible = "allwinner,periph-clock"; clock-output-names = "lvds"; phandle = <0x00000095>; }; lvds1 { #clock-cells = <0x00000000>; compatible = "allwinner,periph-clock"; clock-output-names = "lvds1"; phandle = <0x00000096>; }; mipi_host { #clock-cells = <0x00000000>; compatible = "allwinner,periph-clock"; clock-output-names = "mipi_host"; assigned-clocks = <0x00000014>; assigned-clock-parents = <0x00000006>; assigned-clock-rates = <0x08f0d180>; phandle = <0x00000014>; }; csi_top { #clock-cells = <0x00000000>; compatible = "allwinner,periph-clock"; clock-output-names = "csi_top"; phandle = <0x0000010e>; }; csi_isp { #clock-cells = <0x00000000>; compatible = "allwinner,periph-clock"; clock-output-names = "csi_isp"; phandle = <0x0000010f>; }; csi_master0 { #clock-cells = <0x00000000>; compatible = "allwinner,periph-clock"; clock-output-names = "csi_master0"; phandle = <0x00000110>; }; csi_master1 { #clock-cells = <0x00000000>; compatible = "allwinner,periph-clock"; clock-output-names = "csi_master1"; phandle = <0x00000111>; }; pio { #clock-cells = <0x00000000>; compatible = "allwinner,periph-clock"; clock-output-names = "pio"; phandle = <0x00000112>; }; ledc { #clock-cells = <0x00000000>; compatible = "allwinner,periph-clock"; clock-output-names = "ledc"; phandle = <0x00000113>; }; cpurcir { #clock-cells = <0x00000000>; compatible = "allwinner,periph-cpus-clock"; clock-output-names = "cpurcir"; phandle = <0x00000114>; }; losc_out { #clock-cells = <0x00000000>; compatible = "allwinner,periph-cpus-clock"; clock-output-names = "losc_out"; phandle = <0x00000115>; }; cpurcpus_pll { #clock-cells = <0x00000000>; compatible = "allwinner,periph-cpus-clock"; clock-output-names = "cpurcpus_pll"; phandle = <0x00000116>; }; cpurcpus { #clock-cells = <0x00000000>; compatible = "allwinner,periph-cpus-clock"; clock-output-names = "cpurcpus"; phandle = <0x00000117>; }; cpurahbs { #clock-cells = <0x00000000>; compatible = "allwinner,periph-cpus-clock"; clock-output-names = "cpurahbs"; phandle = <0x00000118>; }; cpurapbs1 { #clock-cells = <0x00000000>; compatible = "allwinner,periph-cpus-clock"; clock-output-names = "cpurapbs1"; phandle = <0x00000119>; }; cpurapbs2_pll { #clock-cells = <0x00000000>; compatible = "allwinner,periph-cpus-clock"; clock-output-names = "cpurapbs2_pll"; phandle = <0x0000011a>; }; cpurapbs2 { #clock-cells = <0x00000000>; compatible = "allwinner,periph-cpus-clock"; clock-output-names = "cpurapbs2"; phandle = <0x0000011b>; }; ppu { #clock-cells = <0x00000000>; compatible = "allwinner,periph-cpus-clock"; clock-output-names = "ppu"; phandle = <0x0000011c>; }; cpurpio { #clock-cells = <0x00000000>; compatible = "allwinner,periph-cpus-clock"; clock-output-names = "cpurpio"; phandle = <0x0000011d>; }; dcxo_out { #clock-cells = <0x00000000>; compatible = "allwinner,periph-cpus-clock"; clock-output-names = "dcxo_out"; phandle = <0x0000011e>; }; suart { #clock-cells = <0x00000000>; compatible = "allwinner,periph-cpus-clock"; clock-output-names = "suart"; phandle = <0x0000011f>; }; lradc { #clock-cells = <0x00000000>; compatible = "allwinner,periph-clock"; clock-output-names = "lradc"; phandle = <0x00000120>; }; }; aliases { serial0 = "/soc@2900000/uart@5000000"; serial1 = "/soc@2900000/uart@5000400"; serial2 = "/soc@2900000/uart@5000800"; serial3 = "/soc@2900000/uart@5000c00"; serial4 = "/soc@2900000/uart@5001000"; serial5 = "/soc@2900000/uart@5001400"; serial6 = "/soc@2900000/uart@5001800"; serial7 = "/soc@2900000/uart@7080000"; disp = "/soc@2900000/uboot_disp@06100000"; lcd0 = "/soc@2900000/lcd0@1c0c000"; lcd1 = "/soc@2900000/lcd1@1"; eink = "/soc@2900000/uboot_eink@6400000"; mmc0 = "/soc@2900000/sdmmc@4020000"; mmc2 = "/soc@2900000/sdmmc@4022000"; nand0 = "/soc@2900000/nand0@04011000"; twi0 = "/soc@2900000/twi@5002000"; twi1 = "/soc@2900000/twi@5002400"; twi2 = "/soc@2900000/twi@5002800"; twi3 = "/soc@2900000/twi@5002c00"; twi4 = "/soc@2900000/twi@5003000"; twi5 = "/soc@2900000/twi@5003400"; twi6 = "/soc@2900000/s_twi@7081400"; twi7 = "/soc@2900000/s_twi@7081800"; spi0 = "/soc@2900000/spi@5010000"; spi1 = "/soc@2900000/spi@5011000"; spi2 = "/soc@2900000/spi@5012000"; ledc = "/soc@2900000/ledc@0x5018000"; pwm = "/soc@2900000/pwm@300a000"; pwm0 = "/soc@2900000/pwm0@300a010"; pwm1 = "/soc@2900000/pwm1@300a011"; pwm2 = "/soc@2900000/pwm2@300a012"; pwm3 = "/soc@2900000/pwm3@300a013"; pwm4 = "/soc@2900000/pwm4@300a014"; pwm5 = "/soc@2900000/pwm5@300a015"; pwm6 = "/soc@2900000/pwm6@300a016"; pwm7 = "/soc@2900000/pwm7@300a017"; pwm8 = "/soc@2900000/pwm8@300a018"; pwm9 = "/soc@2900000/pwm9@300a019"; global-timer0 = "/soc@2900000/timer@3009000"; pmu0 = "/soc@2900000/s_twi@7081400/pmu@34"; standby-param = "/soc@2900000/standby_param@7000400"; ctp = "/soc@2900000/twi@5002000/ctp@0"; }; reserved-memory { #address-cells = <0x00000002>; #size-cells = <0x00000002>; ranges; bl31 { reg = <0x00000000 0x48000000 0x00000000 0x01000000>; }; }; chosen { bootargs = "earlyprintk=sunxi-uart,0x05000000 loglevel=8 initcall_debug=0 console=ttyS0 init=/init"; linux,initrd-start = <0x00000000 0x00000000>; linux,initrd-end = <0x00000000 0x00000000>; }; firmware { android { compatible = "android,firmware"; boot_devices = "soc@2900000/4020000.sdmmc,soc@2900000/4022000.sdmmc,soc@2900000"; vbmeta { compatible = "android,vbmeta"; parts = "vbmeta,vbmeta_system,vbmeta_vendor,boot"; }; }; optee { compatible = "linaro,optee-tz"; method = "smc"; }; }; cpus { #address-cells = <0x00000002>; #size-cells = <0x00000000>; cpu@0 { device_type = "cpu"; compatible = "arm,cortex-a53", "arm,armv8"; reg = <0x00000000 0x00000000>; enable-method = "psci"; clocks = <0x00000015 0x00000018>; clock-latency = <0x001e8480>; clock-frequency = <0x4ead9a00>; dynamic-power-coefficient = <0x000000be>; operating-points-v2 = <0x00000016>; cpu-idle-states = <0x00000017 0x00000018>; #cooling-cells = <0x00000002>; cpu-supply = <0x00000019>; phandle = <0x0000001f>; }; cpu@1 { device_type = "cpu"; compatible = "arm,cortex-a53", "arm,armv8"; reg = <0x00000000 0x00000001>; enable-method = "psci"; clocks = <0x00000015 0x00000018>; clock-frequency = <0x4ead9a00>; operating-points-v2 = <0x00000016>; cpu-idle-states = <0x00000017 0x00000018>; #cooling-cells = <0x00000002>; phandle = <0x00000021>; }; cpu@2 { device_type = "cpu"; compatible = "arm,cortex-a53", "arm,armv8"; reg = <0x00000000 0x00000002>; enable-method = "psci"; clocks = <0x00000015 0x00000018>; clock-frequency = <0x4ead9a00>; operating-points-v2 = <0x00000016>; cpu-idle-states = <0x00000017 0x00000018>; #cooling-cells = <0x00000002>; phandle = <0x00000022>; }; cpu@3 { device_type = "cpu"; compatible = "arm,cortex-a53", "arm,armv8"; reg = <0x00000000 0x00000003>; enable-method = "psci"; clocks = <0x00000015 0x00000018>; clock-frequency = <0x4ead9a00>; operating-points-v2 = <0x00000016>; cpu-idle-states = <0x00000017 0x00000018>; #cooling-cells = <0x00000002>; phandle = <0x00000023>; }; idle-states { entry-method = "arm,psci"; cpu-sleep-0 { compatible = "arm,idle-state"; arm,psci-suspend-param = <0x00010000>; entry-latency-us = <0x0000002e>; exit-latency-us = <0x0000003b>; min-residency-us = <0x00000df2>; local-timer-stop; phandle = <0x00000017>; }; cluster-sleep-0 { compatible = "arm,idle-state"; arm,psci-suspend-param = <0x01010000>; entry-latency-us = <0x0000002f>; exit-latency-us = <0x0000004a>; min-residency-us = <0x00001388>; local-timer-stop; phandle = <0x00000018>; }; }; }; cpu-opp-table { compatible = "allwinner,sun50i-operating-points"; nvmem-cells = <0x0000001a 0x0000001b 0x0000001c>; nvmem-cell-names = "speed", "bin", "bin_ext"; opp-shared; phandle = <0x00000016>; opp@408000000 { opp-hz = <0x00000000 0x18519600>; clock-latency-ns = <0x0003b9b0>; opp-microvolt-a0 = <0x000dbba0>; opp-microvolt-a1 = <0x000dbba0>; opp-microvolt-a2 = <0x000dbba0>; opp-microvolt-a3 = <0x000e57e0>; opp-microvolt-a4 = <0x000e57e0>; opp-microvolt-a5 = <0x000e09c0>; opp-microvolt-a6 = <0x000e09c0>; opp-microvolt-b0 = <0x000dbba0>; opp-microvolt-b1 = <0x000dbba0>; opp-microvolt-b2 = <0x000e57e0>; opp-microvolt-b3 = <0x000e09c0>; opp-supported-hw = <0x00000007>; }; opp@600000000 { opp-hz = <0x00000000 0x23c34600>; clock-latency-ns = <0x0003b9b0>; opp-microvolt-a0 = <0x000dbba0>; opp-microvolt-a1 = <0x000dbba0>; opp-microvolt-a2 = <0x000dbba0>; opp-microvolt-a3 = <0x000e57e0>; opp-microvolt-a4 = <0x000e57e0>; opp-microvolt-a5 = <0x000e09c0>; opp-microvolt-a6 = <0x000e09c0>; opp-microvolt-b0 = <0x000dbba0>; opp-microvolt-b1 = <0x000dbba0>; opp-microvolt-b2 = <0x000e57e0>; opp-microvolt-b3 = <0x000e09c0>; opp-supported-hw = <0x00000007>; }; opp@816000000 { opp-hz = <0x00000000 0x30a32c00>; clock-latency-ns = <0x0003b9b0>; opp-microvolt-a0 = <0x000e57e0>; opp-microvolt-a1 = <0x000dbba0>; opp-microvolt-a2 = <0x000dbba0>; opp-microvolt-a3 = <0x000e57e0>; opp-microvolt-a4 = <0x000e57e0>; opp-microvolt-a5 = <0x000e09c0>; opp-microvolt-a6 = <0x000e09c0>; opp-microvolt-b0 = <0x000dbba0>; opp-microvolt-b1 = <0x000dbba0>; opp-microvolt-b2 = <0x000e57e0>; opp-microvolt-b3 = <0x000e09c0>; opp-supported-hw = <0x00000007>; }; opp@1008000000 { opp-hz = <0x00000000 0x3c14dc00>; clock-latency-ns = <0x0003b9b0>; opp-microvolt-a0 = <0x000f9060>; opp-microvolt-a1 = <0x000ef420>; opp-microvolt-a2 = <0x000e7ef0>; opp-microvolt-a3 = <0x000f9060>; opp-microvolt-a4 = <0x000ea600>; opp-microvolt-a5 = <0x000e57e0>; opp-microvolt-a6 = <0x000e57e0>; opp-microvolt-b0 = <0x000ef420>; opp-microvolt-b1 = <0x000e7ef0>; opp-microvolt-b2 = <0x000ea600>; opp-microvolt-b3 = <0x000e57e0>; opp-supported-hw = <0x00000007>; }; opp@1200000000 { opp-hz = <0x00000000 0x47868c00>; clock-latency-ns = <0x0003b9b0>; opp-microvolt-a0 = <0x0010c8e0>; opp-microvolt-a1 = <0x000f9060>; opp-microvolt-a2 = <0x000f4240>; opp-microvolt-a3 = <0x0010c8e0>; opp-microvolt-a4 = <0x000ef420>; opp-microvolt-a5 = <0x000ea600>; opp-microvolt-a6 = <0x000ea600>; opp-microvolt-b0 = <0x000f9060>; opp-microvolt-b1 = <0x000f4240>; opp-microvolt-b2 = <0x000ef420>; opp-microvolt-b3 = <0x000ea600>; opp-supported-hw = <0x00000007>; }; opp@1320000000 { opp-hz = <0x00000000 0x4ead9a00>; clock-latency-ns = <0x0003b9b0>; opp-microvolt-a0 = <0x0011b340>; opp-microvolt-a1 = <0x00102ca0>; opp-microvolt-a2 = <0x000fb770>; opp-microvolt-a3 = <0x0011b340>; opp-microvolt-a4 = <0x000f9060>; opp-microvolt-a5 = <0x000f4240>; opp-microvolt-a6 = <0x000f4240>; opp-microvolt-b0 = <0x00102ca0>; opp-microvolt-b1 = <0x000fb770>; opp-microvolt-b2 = <0x000f9060>; opp-microvolt-b3 = <0x000f4240>; opp-supported-hw = <0x00000007>; }; opp@1416000000 { opp-hz = <0x00000000 0x54667200>; clock-latency-ns = <0x0003b9b0>; opp-microvolt-b0 = <0x0010c8e0>; opp-microvolt-b1 = <0x001053b0>; opp-microvolt-b2 = <0x00102ca0>; opp-microvolt-b3 = <0x000fde80>; opp-supported-hw = <0x00000006>; }; opp@1464000000 { opp-hz = <0x00000000 0x5742de00>; clock-latency-ns = <0x0003b9b0>; opp-microvolt-a0 = <0x00120160>; opp-microvolt-a1 = <0x00120160>; opp-microvolt-a2 = <0x00113e10>; opp-microvolt-a3 = <0x00120160>; opp-microvolt-a4 = <0x0010c8e0>; opp-microvolt-a5 = <0x00107ac0>; opp-microvolt-a6 = <0x00107ac0>; opp-supported-hw = <0x00000001>; }; opp@1512000000 { opp-hz = <0x00000000 0x5a1f4a00>; clock-latency-ns = <0x0003b9b0>; opp-microvolt-b0 = <0x00120160>; opp-microvolt-b1 = <0x00113e10 0x00113e10 0x00116520>; opp-microvolt-b2 = <0x0010c8e0>; opp-microvolt-b3 = <0x00107ac0>; opp-supported-hw = <0x00000006>; }; opp@1608000000 { opp-hz = <0x00000000 0x5fd82200>; clock-latency-ns = <0x0003b9b0>; opp-microvolt-b0 = <0x00120160>; opp-microvolt-b1 = <0x00113e10 0x00113e10 0x00116520>; opp-supported-hw = <0x00000000>; }; }; dcxo24M-clk { #clock-cells = <0x00000000>; compatible = "fixed-clock"; clock-frequency = <0x016e3600>; clock-output-names = "dcxo24M"; phandle = <0x00000028>; }; thermal-zones { cpu_thermal_zone { polling-delay-passive = <0x000001f4>; polling-delay = <0x000003e8>; thermal-sensors = <0x0000001d 0x00000000>; sustainable-power = <0x000004b0>; trips { phandle = <0x00000121>; trip-point@0 { temperature = <0x00011170>; type = "passive"; hysteresis = <0x00000000>; phandle = <0x00000122>; }; trip-point@1 { temperature = <0x00015f90>; type = "passive"; hysteresis = <0x00000000>; phandle = <0x0000001e>; }; cpu_crit@0 { temperature = <0x0001adb0>; type = "critical"; hysteresis = <0x00000000>; phandle = <0x00000123>; }; }; cooling-maps { map0 { trip = <0x0000001e>; cooling-device = <0x0000001f 0xffffffff 0xffffffff>; contribution = <0x00000400>; }; }; }; gpu_thermal_zone { polling-delay-passive = <0x000001f4>; polling-delay = <0x000003e8>; thermal-sensors = <0x0000001d 0x00000001>; sustainable-power = <0x0000044c>; }; ddr_thermal_zone { polling-delay-passive = <0x00000000>; polling-delay = <0x00000000>; thermal-sensors = <0x0000001d 0x00000002>; }; }; psci { compatible = "arm,psci-1.0"; method = "smc"; }; memory@40000000 { device_type = "memory"; reg = <0x00000000 0x40000000 0x00000000 0x20000000>; }; interrupt-controller@3020000 { compatible = "arm,cortex-a15-gic", "arm,cortex-a9-gic"; #interrupt-cells = <0x00000003>; #address-cells = <0x00000000>; device_type = "gic"; interrupt-controller; reg = <0x00000000 0x03021000 0x00000000 0x00001000 0x00000000 0x03022000 0x00000000 0x00002000 0x00000000 0x03024000 0x00000000 0x00002000 0x00000000 0x03026000 0x00000000 0x00002000>; interrupts = <0x00000001 0x00000009 0x00000f04>; interrupt-parent = <0x00000020>; phandle = <0x00000020>; }; interrupt-controller@0 { compatible = "allwinner,sunxi-wakeupgen"; interrupt-controller; #interrupt-cells = <0x00000003>; interrupt-parent = <0x00000020>; phandle = <0x00000001>; }; timer_arch { compatible = "arm,armv8-timer"; interrupts = <0x00000001 0x0000000d 0x00000f08 0x00000001 0x0000000e 0x00000f08 0x00000001 0x0000000b 0x00000f08 0x00000001 0x0000000a 0x00000f08>; clock-frequency = <0x016e3600>; interrupt-parent = <0x00000020>; arm,no-tick-in-suspend; }; pmu { compatible = "arm,armv8-pmuv3"; interrupts = <0x00000000 0x0000008c 0x00000004 0x00000000 0x0000008d 0x00000004 0x00000000 0x0000008e 0x00000004 0x00000000 0x0000008f 0x00000004>; interrupt-affinity = <0x0000001f 0x00000021 0x00000022 0x00000023>; }; gpu-power-domain@7001000 { compatible = "allwinner,gpu-pd", "syscon"; reg = <0x00000000 0x07001000 0x00000000 0x00000040>; interrupts = <0x00000000 0x00000077 0x00000004>; interrupt-names = "ppu-irq"; clocks = <0x00000024 0x00000008>; clock-names = "ppu"; resets = <0x00000024 0x00000002>; reset-names = "ppu_rst"; #power-domain-cells = <0x00000000>; phandle = <0x000000b2>; }; intc-nmi@7010320 { compatible = "allwinner,sun8i-nmi"; interrupt-parent = <0x00000020>; #interrupt-cells = <0x00000002>; #address-cells = <0x00000000>; interrupt-controller; reg = <0x00000000 0x07010320 0x00000000 0x0000000c>; interrupts = <0x00000000 0x00000067 0x00000004>; phandle = <0x0000005e>; }; dram { compatible = "allwinner,dram"; clocks = <0x00000015 0x00000002>; clock-names = "pll_ddr"; dram_clk = <0x000002a0>; dram_type = <0x00000008>; dram_zq = <0x07070707>; dram_odt_en = <0x0d0d0d0d>; dram_para1 = <0x00000e0e>; dram_para2 = <0x0d0a050c>; dram_mr0 = <0x000030fa>; dram_mr1 = <0x08001000>; dram_mr2 = <0x00000000>; dram_mr3 = <0x00000034>; dram_tpr0 = <0x0000001b>; dram_tpr1 = <0x00000033>; dram_tpr2 = <0x00000003>; dram_tpr3 = <0x00000000>; dram_tpr4 = <0x00000000>; dram_tpr5 = <0x00000004>; dram_tpr6 = <0x00000072>; dram_tpr7 = <0x00000000>; dram_tpr8 = <0x00000007>; dram_tpr9 = <0x00000000>; dram_tpr10 = <0x00000000>; dram_tpr11 = <0x00000026>; dram_tpr12 = <0x06060606>; dram_tpr13 = <0x04040404>; phandle = <0x00000124>; }; clk_ddr { compatible = "allwinner,clock_ddr"; reg = <0x00000000 0x03001000 0x00000000 0x00001000 0x00000000 0x04810000 0x00000000 0x00002000>; clocks = <0x00000015 0x00000002>; clock-names = "pll_ddr"; #clock-cells = <0x00000000>; phandle = <0x00000025>; }; nsi-pmu@3100000 { compatible = "allwinner,sunxi-dfi", "syscon"; reg = <0x00000000 0x03100000 0x00000000 0x00010000>; clocks = <0x00000025>; clock-names = "dram"; phandle = <0x00000026>; }; opp_table { compatible = "operating-points-v2"; phandle = <0x00000027>; opp@336000000 { opp-hz = <0x00000000 0x1406f400>; }; opp@448000000 { opp-hz = <0x00000000 0x1ab3f000>; }; opp@537600000 { opp-hz = <0x00000000 0x200b2000>; }; opp@672000000 { opp-hz = <0x00000000 0x280de800>; }; }; sunxi-dmcfreq { compatible = "allwinner,sunxi-dmc"; devfreq-events = <0x00000026>; clocks = <0x00000025>; clock-names = "dram"; operating-points-v2 = <0x00000027>; upthreshold = <0x00000032>; downdifferential = <0x00000014>; }; uboot { phandle = <0x00000125>; }; iommu@30f0000 { compatible = "allwinner,sunxi-iommu"; reg = <0x00000000 0x030f0000 0x00000000 0x00001000>; interrupts = <0x00000000 0x00000042 0x00000004>; interrupt-names = "iommu-irq"; clocks = <0x00000015 0x00000037>; clock-names = "iommu"; #iommu-cells = <0x00000002>; phandle = <0x00000081>; }; dump_reg@20000 { compatible = "allwinner,sunxi-dump-reg"; reg = <0x00000000 0x00020000 0x00000000 0x00000004>; phandle = <0x00000126>; }; pio-18 { compatible = "regulator-fixed"; regulator-name = "pio-18"; regulator-min-microvolt = <0x001b7740>; regulator-max-microvolt = <0x001b7740>; phandle = <0x000000b0>; }; pio-28 { compatible = "regulator-fixed"; regulator-name = "pio-28"; regulator-min-microvolt = <0x002ab980>; regulator-max-microvolt = <0x002ab980>; phandle = <0x00000127>; }; pio-33 { compatible = "regulator-fixed"; regulator-name = "pio-33"; regulator-min-microvolt = <0x00325aa0>; regulator-max-microvolt = <0x00325aa0>; phandle = <0x000000b1>; }; soc@2900000 { compatible = "simple-bus"; #address-cells = <0x00000002>; #size-cells = <0x00000002>; ranges; device_type = "soc"; phandle = <0x00000128>; sram_ctrl@3000000 { compatible = "allwinner,sram_ctrl"; reg = <0x00000000 0x03000000 0x00000000 0x0000016c>; phandle = <0x00000129>; soc_ver { offset = <0x00000024>; mask = <0x00000007>; shift = <0x00000000>; ver_a = <0x18550000>; ver_b = <0x18550001>; }; soc_id { offset = <0x00000200>; mask = <0x00000001>; shift = <0x00000016>; }; soc_bin { offset = <0x00000000>; mask = <0x000003ff>; shift = <0x00000000>; }; }; clock@3001000 { compatible = "allwinner,sun50iw10-ccu"; reg = <0x00000000 0x03001000 0x00000000 0x00001000>; clocks = <0x00000028 0x00000029 0x00000002 0x00000029 0x00000001>; clock-names = "hosc", "losc", "iosc"; #clock-cells = <0x00000001>; #reset-cells = <0x00000001>; phandle = <0x00000015>; }; clock@7010000 { compatible = "allwinner,sun50iw10-r-ccu"; reg = <0x00000000 0x07010000 0x00000000 0x00000240>; clocks = <0x00000028 0x00000029 0x00000002 0x00000029 0x00000001 0x00000015 0x00000003>; clock-names = "hosc", "losc", "iosc", "pll-periph"; #clock-cells = <0x00000001>; #reset-cells = <0x00000001>; phandle = <0x00000024>; }; dma-controller@3002000 { compatible = "allwinner,sun50iw10-dma"; reg = <0x00000000 0x03002000 0x00000000 0x00001000>; interrupts = <0x00000000 0x0000002d 0x00000004>; clocks = <0x00000015 0x0000002f 0x00000015 0x00000038>; clock-names = "bus", "mbus"; dma-channels = <0x00000008>; dma-requests = <0x00000034>; resets = <0x00000015 0x00000008>; #dma-cells = <0x00000001>; phandle = <0x00000055>; }; rtc@7000000 { compatible = "allwinner,sun50iw10p1-rtc"; device_type = "rtc"; wakeup-source; reg = <0x00000000 0x07000000 0x00000000 0x00000200>; interrupts = <0x00000000 0x0000006c 0x00000004>; clocks = <0x00000024 0x0000000e 0x00000029 0x00000004>; clock-names = "r-ahb-rtc", "rtc-1k"; resets = <0x00000024 0x00000007>; gpr_offset = <0x00000100>; gpr_len = <0x00000008>; gpr_cur_pos = <0x00000006>; phandle = <0x0000012a>; }; rtc_ccu@7000000 { compatible = "allwinner,sun50iw10p1-rtc-ccu"; device_type = "rtc-ccu"; reg = <0x00000000 0x07000000 0x00000000 0x00000200>; #clock-cells = <0x00000001>; clock-output-names = "dcxo24M-out", "iosc", "osc32k", "osc32k-out", "rtc-1k"; phandle = <0x00000029>; }; nsi-controller@3100000 { compatible = "allwinner,sun50i-nsi"; interrupts = <0x00000000 0x0000003f 0x00000004>; reg = <0x00000000 0x03100000 0x00000000 0x00010000>; clocks = <0x00000015 0x00000004 0x00000015 0x0000001f 0x00000015 0x00000002>; clock-names = "pll", "bus", "sdram"; resets = <0x00000015 0x00000000>; clock-frequency = <0x17d78400>; #nsi-cells = <0x00000001>; phandle = <0x0000012b>; cpu { mode = <0x00000000>; pri = <0x00000000>; select = <0x00000000>; }; gpu { mode = <0x00000000>; pri = <0x00000003>; select = <0x00000001>; }; sd1 { mode = <0x00000001>; pri = <0x00000002>; select = <0x00000000>; }; mstg { mode = <0x00000000>; pri = <0x00000001>; select = <0x00000000>; }; ce { mode = <0x00000001>; pri = <0x00000000>; select = <0x00000001>; }; }; sid@3006000 { compatible = "allwinner,sun50iw10p1-sid", "allwinner,sunxi-sid"; reg = <0x00000000 0x03006000 0x00000000 0x00001000>; #address-cells = <0x00000001>; #size-cells = <0x00000001>; speed@00 { reg = <0x00000000 0x00000002>; phandle = <0x0000001a>; }; calib@14 { reg = <0x00000014 0x00000008>; phandle = <0x0000002a>; }; calib@1c { reg = <0x0000001c 0x00000002>; phandle = <0x0000001b>; }; calib@28 { reg = <0x00000028 0x00000004>; phandle = <0x0000001c>; }; secure_status { reg = <0x00000000 0x00000000>; offset = <0x000000a0>; size = <0x00000004>; }; chipid { reg = <0x00000000 0x00000000>; offset = <0x00000200>; size = <0x00000010>; }; rotpk { reg = <0x00000000 0x00000000>; offset = <0x00000270>; size = <0x00000020>; }; }; ce@1904000 { compatible = "allwinner,sunxi-ce"; device_name = "ce"; reg = <0x00000000 0x01904000 0x00000000 0x000000a0 0x00000000 0x01904800 0x00000000 0x000000a0>; interrupts = <0x00000000 0x0000005c 0x00000001 0x00000000 0x0000005d 0x00000001>; clock-frequency = <0x17d78400>; clocks = <0x00000015 0x0000002c 0x00000015 0x0000002b 0x00000015 0x0000003a 0x00000015 0x00000004>; clock-names = "bus_ce", "ce_clk", "mbus_ce", "pll_periph0_2x"; resets = <0x00000015 0x00000006>; phandle = <0x0000012c>; }; ths@5070400 { compatible = "allwinner,sun50iw10p1-ths"; reg = <0x00000000 0x05070400 0x00000000 0x00000400>; clocks = <0x00000015 0x00000067>; clock-names = "bus"; resets = <0x00000015 0x0000002a>; nvmem-cells = <0x0000002a>; nvmem-cell-names = "calibration"; #thermal-sensor-cells = <0x00000001>; phandle = <0x0000001d>; }; timer@3009000 { compatible = "allwinner,sun4i-a10-timer"; device_type = "soc_timer"; reg = <0x00000000 0x03009000 0x00000000 0x000000a0>; interrupt-parent = <0x00000020>; interrupts = <0x00000000 0x00000033 0x00000004>; clocks = <0x00000028>; phandle = <0x0000012d>; }; uart@5000000 { compatible = "allwinner,sun50i-uart"; device_type = "uart0"; reg = <0x00000000 0x05000000 0x00000000 0x00000400>; interrupts = <0x00000000 0x00000000 0x00000004>; sunxi,uart-fifosize = <0x00000040>; clocks = <0x00000015 0x0000004b>; clock-names = "uart0"; resets = <0x00000015 0x00000015>; pinctrl-names = "default", "sleep"; pinctrl-0 = <0x0000002b>; pinctrl-1 = <0x0000002c>; uart0_port = <0x00000000>; uart0_type = <0x00000002>; uart-supply = <0x0000002d>; phandle = <0x0000012e>; }; uart@5000400 { compatible = "allwinner,sun50i-uart"; device_type = "uart1"; reg = <0x00000000 0x05000400 0x00000000 0x00000400>; interrupts = <0x00000000 0x00000001 0x00000004>; sunxi,uart-fifosize = <0x00000040>; clocks = <0x00000015 0x0000004c>; clock-names = "uart1"; resets = <0x00000015 0x00000016>; pinctrl-names = "default", "sleep"; pinctrl-0 = <0x0000002e>; pinctrl-1 = <0x0000002f>; uart1_port = <0x00000001>; uart1_type = <0x00000004>; status = "okay"; phandle = <0x0000012f>; }; uart@5000800 { compatible = "allwinner,sun50i-uart"; device_type = "uart2"; reg = <0x00000000 0x05000800 0x00000000 0x00000400>; interrupts = <0x00000000 0x00000002 0x00000004>; sunxi,uart-fifosize = <0x00000040>; clocks = <0x00000015 0x0000004d>; clock-names = "uart2"; resets = <0x00000015 0x00000017>; pinctrl-names = "default", "sleep"; pinctrl-0 = <0x00000030>; pinctrl-1 = <0x00000031>; uart2_port = <0x00000002>; uart2_type = <0x00000004>; status = "disabled"; phandle = <0x00000130>; }; uart@5000c00 { compatible = "allwinner,sun50i-uart"; device_type = "uart3"; reg = <0x00000000 0x05000c00 0x00000000 0x00000400>; interrupts = <0x00000000 0x00000003 0x00000004>; sunxi,uart-fifosize = <0x00000040>; clocks = <0x00000015 0x0000004e>; clock-names = "uart3"; resets = <0x00000015 0x00000018>; pinctrl-names = "default", "sleep"; pinctrl-0 = <0x00000032>; pinctrl-1 = <0x00000033>; uart3_port = <0x00000003>; uart3_type = <0x00000004>; status = "disabled"; phandle = <0x00000131>; }; uart@5001000 { compatible = "allwinner,sun50i-uart"; device_type = "uart4"; reg = <0x00000000 0x05001000 0x00000000 0x00000400>; interrupts = <0x00000000 0x00000004 0x00000004>; clocks = <0x00000015 0x0000004f>; clock-names = "uart4"; resets = <0x00000015 0x00000019>; sunxi,uart-fifosize = <0x00000040>; pinctrl-names = "default", "sleep"; pinctrl-0 = <0x00000034>; pinctrl-1 = <0x00000035>; uart4_port = <0x00000004>; uart4_type = <0x00000004>; status = "disabled"; phandle = <0x00000132>; }; uart@5001400 { compatible = "allwinner,sun50i-uart"; device_type = "uart5"; reg = <0x00000000 0x05001400 0x00000000 0x00000400>; interrupts = <0x00000000 0x00000005 0x00000004>; sunxi,uart-fifosize = <0x00000040>; clocks = <0x00000015 0x00000050>; clock-names = "uart5"; resets = <0x00000015 0x0000001a>; pinctrl-names = "default", "sleep"; pinctrl-0 = <0x00000036>; pinctrl-1 = <0x00000037>; uart5_port = <0x00000005>; uart5_type = <0x00000004>; status = "disabled"; phandle = <0x00000133>; }; uart@5001800 { compatible = "allwinner,sun50i-uart"; device_type = "uart6"; reg = <0x00000000 0x05001800 0x00000000 0x00000400>; interrupts = <0x00000000 0x00000006 0x00000004>; sunxi,uart-fifosize = <0x00000040>; pinctrl-names = "default", "sleep"; pinctrl-0 = <0x00000038>; pinctrl-1 = <0x00000039>; uart6_port = <0x00000006>; uart6_type = <0x00000004>; status = "disabled"; phandle = <0x00000134>; }; uart@7080000 { compatible = "allwinner,sun50i-uart"; device_type = "uart7"; reg = <0x00000000 0x07080000 0x00000000 0x00000400>; interrupts = <0x00000000 0x00000070 0x00000004>; sunxi,uart-fifosize = <0x00000040>; pinctrl-names = "default", "sleep"; pinctrl-0 = <0x0000003a>; pinctrl-1 = <0x0000003b>; uart7_port = <0x00000007>; uart7_type = <0x00000002>; status = "disabled"; phandle = <0x00000135>; }; sdmmc@4022000 { compatible = "allwinner,sunxi-mmc-v4p6x"; device_type = "sdc2"; reg = <0x00000000 0x04022000 0x00000000 0x00001000>; interrupts = <0x00000000 0x00000029 0x00000004>; clocks = <0x00000028 0x00000015 0x00000006 0x00000015 0x00000045 0x00000015 0x00000049>; clock-names = "osc24m", "pll_periph", "mmc", "ahb"; resets = <0x00000015 0x00000013>; reset-names = "rst"; pinctrl-names = "default", "sleep"; pinctrl-0 = <0x0000003c 0x0000003d>; pinctrl-1 = <0x0000003e>; bus-width = <0x00000008>; req-page-count = <0x00000002>; cap-mmc-highspeed; cap-cmd23; mmc-cache-ctrl; non-removable; max-frequency = <0x05f5e100>; cap-erase; mmc-high-capacity-erase-size; no-sdio; no-sd; sdc_tm4_sm0_freq0 = <0x00000000>; sdc_tm4_sm0_freq1 = <0x00000000>; sdc_tm4_sm1_freq0 = <0x00000000>; sdc_tm4_sm1_freq1 = <0x00000000>; sdc_tm4_sm2_freq0 = <0x00000000>; sdc_tm4_sm2_freq1 = <0x00000000>; sdc_tm4_sm3_freq0 = <0x05000000>; sdc_tm4_sm3_freq1 = <0x00000005>; sdc_tm4_sm4_freq0 = <0x00050000>; sdc_tm4_sm4_freq1 = <0x00000004>; sdc_tm4_sm4_freq0_cmd = <0x00000000>; sdc_tm4_sm4_freq1_cmd = <0x00000000>; mmc-ddr-1_8v; mmc-hs200-1_8v; mmc-hs400-1_8v; ctl-spec-caps = <0x00000308>; sunxi-power-save-mode; sunxi-dis-signal-vol-sw; mmc-bootpart-noacc; vmmc-supply = <0x0000002d>; vqmmc-supply = <0x0000003f>; status = "disabled"; phandle = <0x00000136>; }; sdmmc@4020000 { compatible = "allwinner,sunxi-mmc-v5p3x"; device_type = "sdc0"; reg = <0x00000000 0x04020000 0x00000000 0x00001000>; interrupts = <0x00000000 0x00000027 0x00000004>; clocks = <0x00000028 0x00000015 0x00000006 0x00000015 0x00000043 0x00000015 0x00000047>; clock-names = "osc24m", "pll_periph", "mmc", "ahb"; resets = <0x00000015 0x00000011>; reset-names = "rst"; pinctrl-names = "default", "mmc_1v8", "sleep", "uart_jtag"; pinctrl-0 = <0x00000040>; pinctrl-1 = <0x00000041>; pinctrl-2 = <0x00000042>; pinctrl-3 = <0x00000043 0x00000044>; max-frequency = <0x08f0d180>; bus-width = <0x00000004>; req-page-count = <0x00000002>; cap-sd-highspeed; cap-wait-while-busy; no-sdio; no-mmc; cd-gpios = <0x00000045 0x00000005 0x00000006 0x00000011>; cd-used-24M; sd-uhs-sdr50; sd-uhs-ddr50; sd-uhs-sdr104; sunxi-power-save-mode; ctl-spec-caps = <0x00000008>; vmmc-supply = <0x0000002d>; vqmmc33sw-supply = <0x0000002d>; vdmmc33sw-supply = <0x0000002d>; vqmmc18sw-supply = <0x0000003f>; vdmmc18sw-supply = <0x0000003f>; status = "okay"; phandle = <0x00000137>; }; sdmmc@4021000 { compatible = "allwinner,sunxi-mmc-v5p3x"; device_type = "sdc1"; reg = <0x00000000 0x04021000 0x00000000 0x00001000>; interrupts = <0x00000000 0x00000028 0x00000004>; clocks = <0x00000028 0x00000015 0x00000006 0x00000015 0x00000044 0x00000015 0x00000048>; clock-names = "osc24m", "pll_periph", "mmc", "ahb"; resets = <0x00000015 0x00000012>; reset-names = "rst"; pinctrl-names = "default", "sleep"; pinctrl-0 = <0x00000046>; pinctrl-1 = <0x00000047>; max-frequency = <0x08f0d180>; bus-width = <0x00000004>; cap-sd-highspeed; no-mmc; keep-power-in-suspend; sunxi-dly-52M-ddr4 = <0x00000001 0x00000000 0x00000000 0x00000000 0x00000002>; sunxi-dly-104M = <0x00000001 0x00000001 0x00000000 0x00000000 0x00000001>; sunxi-dly-208M = <0x00000001 0x00000000 0x00000000 0x00000000 0x00000001>; status = "okay"; no-sd; sd-uhs-sdr25; sd-uhs-sdr50; sd-uhs-ddr50; sd-uhs-sdr104; cap-sdio-irq; ignore-pm-notify; ctl-spec-caps = <0x00000008>; phandle = <0x00000138>; }; sdmmc@4023000 { compatible = "allwinner,sunxi-mmc-v5p3x"; device_type = "sdc3"; reg = <0x00000000 0x04023000 0x00000000 0x00001000>; interrupts = <0x00000000 0x0000002a 0x00000004>; pinctrl-names = "default", "sleep"; pinctrl-0 = <0x00000048>; pinctrl-1 = <0x00000049>; max-frequency = <0x02faf080>; bus-width = <0x00000004>; cap-sd-highspeed; no-sdio; no-mmc; status = "disabled"; phandle = <0x00000139>; }; nand0@04011000 { compatible = "allwinner,sun50iw10-nand"; device_type = "nand0"; reg = <0x00000000 0x04011000 0x00000000 0x00001000>; interrupts = <0x00000000 0x00000026 0x00000004>; clocks = <0x00000015 0x00000006 0x00000015 0x00000040 0x00000015 0x00000041 0x00000015 0x00000042 0x00000015 0x0000003b>; clock-names = "pll_periph", "mclk", "ecc", "bus", "mbus"; resets = <0x00000015 0x00000010>; reset-names = "rst"; pinctrl-names = "default", "sleep"; pinctrl-0 = <0x0000004a 0x0000004b>; pinctrl-1 = <0x0000004c>; nand0_regulator1 = "none"; nand0_regulator2 = "none"; nand0_cache_level = <0x55aaaa55>; nand0_flush_cache_num = <0x55aaaa55>; nand0_capacity_level = <0x55aaaa55>; nand0_id_number_ctl = <0x55aaaa55>; nand0_print_level = <0x55aaaa55>; nand0_p0 = <0x55aaaa55>; nand0_p1 = <0x55aaaa55>; nand0_p2 = <0x55aaaa55>; nand0_p3 = <0x55aaaa55>; chip_code = "sun50iw10"; status = "disabled"; phandle = <0x0000013a>; }; twi@5002000 { #address-cells = <0x00000001>; #size-cells = <0x00000000>; compatible = "allwinner,sun50i-twi"; device_type = "twi0"; reg = <0x00000000 0x05002000 0x00000000 0x00000400>; interrupts = <0x00000000 0x00000007 0x00000004>; clocks = <0x00000015 0x00000052>; resets = <0x00000015 0x0000001c>; clock-names = "bus"; clock-frequency = <0x00061a80>; pinctrl-names = "default", "sleep"; pinctrl-0 = <0x0000004d>; pinctrl-1 = <0x0000004e>; status = "okay"; twi-supply = <0x0000002d>; phandle = <0x0000013b>; ctp@0 { ctp_fw_idx = "2"; compatible = "allwinner,gslX680"; reg = <0x00000040>; device_type = "ctp"; status = "okay"; ctp_name = "gslX680_3676_1280x800"; ctp_twi_id = <0x00000000>; ctp_twi_addr = <0x00000040>; ctp_screen_max_x = <0x00000320>; ctp_screen_max_y = <0x00000500>; ctp_revert_x_flag = <0x00000000>; ctp_revert_y_flag = <0x00000000>; ctp_exchange_x_y_flag = <0x00000001>; ctp_int_port = <0x00000045 0x00000007 0x00000009 0x00000001>; ctp_wakeup = <0x00000045 0x00000007 0x0000000a 0x00000001>; ctp-supply = <0x0000004f>; ctp_power_ldo_vol = <0x00000ce4>; phandle = <0x0000013c>; }; }; twi@5002400 { #address-cells = <0x00000001>; #size-cells = <0x00000000>; compatible = "allwinner,sun50i-twi"; device_type = "twi1"; reg = <0x00000000 0x05002400 0x00000000 0x00000400>; interrupts = <0x00000000 0x00000008 0x00000004>; clocks = <0x00000015 0x00000053>; resets = <0x00000015 0x0000001d>; clock-names = "bus"; clock-frequency = <0x00030d40>; pinctrl-names = "default", "sleep"; pinctrl-0 = <0x00000050>; pinctrl-1 = <0x00000051>; status = "okay"; phandle = <0x0000013d>; gsensor { compatible = "allwinner,mir3da"; reg = <0x00000027>; device_type = "gsensor"; status = "okay"; gsensor_twi_id = <0x00000001>; gsensor_twi_addr = <0x00000027>; gsensor_int1 = <0x00000045 0x00000007 0x0000000b 0x00000001>; gsensor-supply = <0x0000002d>; gsensor_vcc_io_val = <0x00000ce4>; }; lightsensor { compatible = "allwinner,stk3x1x"; reg = <0x00000048>; device_type = "lightsensor"; status = "okay"; ls_twi_id = <0x00000001>; ls_twi_addr = <0x00000048>; ls_int = <0x00000045 0x00000007 0x00000004 0x00000001>; lightsensor-supply = <0x0000002d>; }; }; twi@5002800 { #address-cells = <0x00000001>; #size-cells = <0x00000000>; compatible = "allwinner,sun50i-twi"; device_type = "twi2"; reg = <0x00000000 0x05002800 0x00000000 0x00000400>; interrupts = <0x00000000 0x00000009 0x00000004>; clocks = <0x00000015 0x00000054>; resets = <0x00000015 0x0000001e>; clock-names = "bus"; clock-frequency = <0x00030d40>; pinctrl-names = "default", "sleep"; pinctrl-0 = <0x00000052>; pinctrl-1 = <0x00000053>; status = "okay"; twi-supply = <0x00000054>; twi_vol = <0x001b7740>; dmas = <0x00000055 0x0000002d 0x00000055 0x0000002d>; dma-names = "tx", "rx"; twi_drv_used = <0x00000001>; phandle = <0x0000013e>; }; twi@5002c00 { #address-cells = <0x00000001>; #size-cells = <0x00000000>; compatible = "allwinner,sun50i-twi"; device_type = "twi3"; reg = <0x00000000 0x05002c00 0x00000000 0x00000400>; interrupts = <0x00000000 0x0000000a 0x00000004>; clocks = <0x00000015 0x00000055>; resets = <0x00000015 0x0000001f>; clock-names = "bus"; clock-frequency = <0x00030d40>; pinctrl-names = "default", "sleep"; pinctrl-0 = <0x00000056>; pinctrl-1 = <0x00000057>; status = "okay"; twi-supply = <0x00000054>; twi_vol = <0x001b7740>; dmas = <0x00000055 0x0000002e 0x00000055 0x0000002e>; dma-names = "tx", "rx"; twi_drv_used = <0x00000001>; phandle = <0x0000013f>; }; twi@5003000 { #address-cells = <0x00000001>; #size-cells = <0x00000000>; compatible = "allwinner,sun50i-twi"; device_type = "twi4"; reg = <0x00000000 0x05003000 0x00000000 0x00000400>; interrupts = <0x00000000 0x0000000b 0x00000004>; clocks = <0x00000015 0x00000056>; resets = <0x00000015 0x00000020>; clock-names = "bus"; clock-frequency = <0x000186a0>; pinctrl-names = "default", "sleep"; pinctrl-0 = <0x00000058>; pinctrl-1 = <0x00000059>; status = "disabled"; phandle = <0x00000140>; }; twi@5003400 { #address-cells = <0x00000001>; #size-cells = <0x00000000>; compatible = "allwinner,sun50i-twi"; device_type = "twi5"; reg = <0x00000000 0x05003400 0x00000000 0x00000400>; interrupts = <0x00000000 0x0000000c 0x00000004>; clocks = <0x00000015 0x00000057>; resets = <0x00000015 0x00000021>; clock-names = "bus"; clock-frequency = <0x000186a0>; pinctrl-names = "default", "sleep"; pinctrl-0 = <0x0000005a>; pinctrl-1 = <0x0000005b>; status = "disabled"; phandle = <0x00000141>; }; s_twi@7081400 { #address-cells = <0x00000001>; #size-cells = <0x00000000>; compatible = "allwinner,sun50i-twi"; reg = <0x00000000 0x07081400 0x00000000 0x00000200>; interrupts = <0x00000000 0x00000071 0x00000004>; clocks = <0x00000024 0x0000000a>; resets = <0x00000024 0x00000004>; clock-names = "bus"; clock-frequency = <0x00030d40>; pinctrl-names = "default", "sleep"; pinctrl-0 = <0x0000005c>; status = "okay"; pinctrl-1 = <0x0000005d>; no_suspend = <0x00000001>; twi_drv_used = <0x00000001>; phandle = <0x00000142>; pmu@34 { compatible = "x-powers,axp2202"; reg = <0x00000034>; status = "okay"; interrupts = <0x00000000 0x00000008>; interrupt-parent = <0x0000005e>; x-powers,drive-vbus-en; pmu_reset = <0x00000000>; pmu_irq_wakeup = <0x00000001>; pmu_hot_shutdown = <0x00000001>; wakeup-source; phandle = <0x00000143>; usb_power_supply { compatible = "x-powers,axp2202-usb-power-supply"; status = "okay"; pmu_usbpc_vol = <0x00001194>; pmu_usbpc_cur = <0x000001f4>; pmu_usbad_vol = <0x00001194>; pmu_usbad_cur = <0x000009c4>; pmu_usb_typec_used = <0x00000001>; wakeup_usb_in; wakeup_usb_out; phandle = <0x00000090>; }; gpio_power_supply { compatible = "x-powers,gpio-supply"; status = "disabled"; pmu_acin_det_gpio = <0x00000045 0x00000001 0x00000004 0x00000001>; pmu_acin_usbid_drv = <0x00000045 0x00000001 0x00000006 0x00000001>; wakeup_gpio; phandle = <0x00000144>; }; bat-power-supply { compatible = "x-powers,axp2202-bat-power-supply"; param = <0x0000005f>; status = "okay"; pmu_chg_ic_temp = <0x00000000>; pmu_battery_rdc = <0x00000069>; pmu_battery_cap = <0x00001360>; pmu_runtime_chgcur = <0x000005dc>; pmu_suspend_chgcur = <0x000007bc>; pmu_shutdown_chgcur = <0x000005dc>; pmu_init_chgvol = <0x000010fe>; pmu_battery_warning_level1 = <0x0000000f>; pmu_battery_warning_level2 = <0x00000000>; pmu_chgled_func = <0x00000000>; pmu_chgled_type = <0x00000000>; ocv_coulumb_100 = <0x00000001>; pmu_bat_para1 = <0x00000000>; pmu_bat_para2 = <0x00000000>; pmu_bat_para3 = <0x00000000>; pmu_bat_para4 = <0x00000000>; pmu_bat_para5 = <0x00000000>; pmu_bat_para6 = <0x00000000>; pmu_bat_para7 = <0x00000002>; pmu_bat_para8 = <0x00000003>; pmu_bat_para9 = <0x00000004>; pmu_bat_para10 = <0x00000006>; pmu_bat_para11 = <0x00000009>; pmu_bat_para12 = <0x0000000e>; pmu_bat_para13 = <0x0000001a>; pmu_bat_para14 = <0x00000026>; pmu_bat_para15 = <0x00000031>; pmu_bat_para16 = <0x00000034>; pmu_bat_para17 = <0x00000038>; pmu_bat_para18 = <0x0000003c>; pmu_bat_para19 = <0x00000040>; pmu_bat_para20 = <0x00000046>; pmu_bat_para21 = <0x0000004d>; pmu_bat_para22 = <0x00000053>; pmu_bat_para23 = <0x00000057>; pmu_bat_para24 = <0x0000005a>; pmu_bat_para25 = <0x0000005f>; pmu_bat_para26 = <0x00000063>; pmu_bat_para27 = <0x00000063>; pmu_bat_para28 = <0x00000064>; pmu_bat_para29 = <0x00000064>; pmu_bat_para30 = <0x00000064>; pmu_bat_para31 = <0x00000064>; pmu_bat_para32 = <0x00000064>; pmu_bat_temp_enable = <0x00000000>; pmu_bat_charge_ltf = <0x00000451>; pmu_bat_charge_htf = <0x00000079>; pmu_bat_shutdown_ltf = <0x00000565>; pmu_bat_shutdown_htf = <0x00000059>; pmu_bat_temp_para1 = <0x00000afe>; pmu_bat_temp_para2 = <0x0000089a>; pmu_bat_temp_para3 = <0x000006c9>; pmu_bat_temp_para4 = <0x00000565>; pmu_bat_temp_para5 = <0x00000451>; pmu_bat_temp_para6 = <0x0000037a>; pmu_bat_temp_para7 = <0x000002d2>; pmu_bat_temp_para8 = <0x000001e4>; pmu_bat_temp_para9 = <0x0000014c>; pmu_bat_temp_para10 = <0x000000e9>; pmu_bat_temp_para11 = <0x000000c4>; pmu_bat_temp_para12 = <0x000000a6>; pmu_bat_temp_para13 = <0x0000008d>; pmu_bat_temp_para14 = <0x00000079>; pmu_bat_temp_para15 = <0x00000059>; pmu_bat_temp_para16 = <0x00000042>; wakeup_bat_out; phandle = <0x00000145>; }; powerkey@0 { status = "okay"; compatible = "x-powers,axp2101-pek"; pmu_powkey_off_time = <0x00001770>; pmu_powkey_off_func = <0x00000000>; pmu_powkey_off_en = <0x00000001>; pmu_powkey_long_time = <0x000005dc>; pmu_powkey_on_time = <0x00000200>; wakeup_rising; wakeup_falling; phandle = <0x00000146>; }; regulators@0 { phandle = <0x00000147>; dcdc1 { regulator-name = "axp2202-dcdc1"; regulator-min-microvolt = <0x0007a120>; regulator-max-microvolt = <0x00177fa0>; regulator-ramp-delay = <0x000000fa>; regulator-enable-ramp-delay = <0x000003e8>; regulator-boot-on; regulator-always-on; phandle = <0x00000019>; }; dcdc2 { regulator-name = "axp2202-dcdc2"; regulator-min-microvolt = <0x0007a120>; regulator-max-microvolt = <0x0033e140>; regulator-ramp-delay = <0x000000fa>; regulator-enable-ramp-delay = <0x000003e8>; regulator-boot-on; regulator-always-on; phandle = <0x00000060>; }; dcdc3 { regulator-name = "axp2202-dcdc3"; regulator-min-microvolt = <0x0007a120>; regulator-max-microvolt = <0x001c1380>; regulator-ramp-delay = <0x000000fa>; regulator-enable-ramp-delay = <0x000003e8>; regulator-always-on; phandle = <0x00000061>; }; dcdc4 { regulator-name = "axp2202-dcdc4"; regulator-min-microvolt = <0x000f4240>; regulator-max-microvolt = <0x00387520>; regulator-ramp-delay = <0x000000fa>; regulator-enable-ramp-delay = <0x000003e8>; phandle = <0x00000062>; }; rtcldo { regulator-name = "axp2202-rtcldo"; regulator-min-microvolt = <0x001b7740>; regulator-max-microvolt = <0x001b7740>; regulator-boot-on; regulator-always-on; phandle = <0x00000063>; }; aldo1 { regulator-name = "axp2202-aldo1"; regulator-min-microvolt = <0x0007a120>; regulator-max-microvolt = <0x003567e0>; regulator-enable-ramp-delay = <0x000003e8>; phandle = <0x00000064>; }; aldo2 { regulator-name = "axp2202-aldo2"; regulator-min-microvolt = <0x0007a120>; regulator-max-microvolt = <0x003567e0>; regulator-enable-ramp-delay = <0x000003e8>; phandle = <0x00000054>; }; aldo3 { regulator-name = "axp2202-aldo3"; regulator-min-microvolt = <0x0007a120>; regulator-max-microvolt = <0x003567e0>; regulator-enable-ramp-delay = <0x000003e8>; regulator-always-on; regulator-boot-on; phandle = <0x00000065>; }; aldo4 { regulator-name = "axp2202-aldo4"; regulator-min-microvolt = <0x0007a120>; regulator-max-microvolt = <0x003567e0>; regulator-enable-ramp-delay = <0x000003e8>; regulator-always-on; regulator-boot-on; phandle = <0x00000066>; }; bldo1 { regulator-name = "axp2202-bldo1"; regulator-min-microvolt = <0x0007a120>; regulator-max-microvolt = <0x003567e0>; regulator-enable-ramp-delay = <0x000003e8>; phandle = <0x00000067>; }; bldo2 { regulator-name = "axp2202-bldo2"; regulator-min-microvolt = <0x0007a120>; regulator-max-microvolt = <0x003567e0>; regulator-enable-ramp-delay = <0x000003e8>; regulator-boot-on; regulator-always-on; phandle = <0x00000068>; }; bldo3 { regulator-name = "axp2202-bldo3"; regulator-min-microvolt = <0x0007a120>; regulator-max-microvolt = <0x003567e0>; regulator-enable-ramp-delay = <0x000003e8>; phandle = <0x00000069>; }; bldo4 { regulator-name = "axp2202-bldo4"; regulator-min-microvolt = <0x0007a120>; regulator-max-microvolt = <0x003567e0>; regulator-enable-ramp-delay = <0x000003e8>; phandle = <0x0000006a>; }; cldo1 { regulator-name = "axp2202-cldo1"; regulator-min-microvolt = <0x0007a120>; regulator-max-microvolt = <0x003567e0>; regulator-enable-ramp-delay = <0x000003e8>; phandle = <0x0000003f>; }; cldo2 { regulator-name = "axp2202-cldo2"; regulator-min-microvolt = <0x0007a120>; regulator-max-microvolt = <0x003567e0>; regulator-enable-ramp-delay = <0x000003e8>; phandle = <0x0000004f>; }; cldo3 { regulator-name = "axp2202-cldo3"; regulator-min-microvolt = <0x0007a120>; regulator-max-microvolt = <0x003567e0>; regulator-ramp-delay = <0x000009c4>; regulator-enable-ramp-delay = <0x000003e8>; regulator-boot-on; phandle = <0x0000002d>; }; cldo4 { regulator-name = "axp2202-cldo4"; regulator-min-microvolt = <0x0007a120>; regulator-max-microvolt = <0x003567e0>; regulator-enable-ramp-delay = <0x000003e8>; phandle = <0x0000006b>; }; cpusldo { regulator-name = "axp2202-cpusldo"; regulator-min-microvolt = <0x0007a120>; regulator-max-microvolt = <0x00155cc0>; regulator-boot-on; regulator-always-on; phandle = <0x0000006c>; }; drivevbus { regulator-name = "axp2202-drivevbus"; regulator-enable-ramp-delay = <0x000003e8>; phandle = <0x0000006d>; }; }; virtual-dcdc1 { compatible = "xpower-vregulator,dcdc1"; dcdc1-supply = <0x00000019>; }; virtual-dcdc2 { compatible = "xpower-vregulator,dcdc2"; dcdc2-supply = <0x00000060>; }; virtual-dcdc3 { compatible = "xpower-vregulator,dcdc3"; dcdc3-supply = <0x00000061>; }; virtual-dcdc4 { compatible = "xpower-vregulator,dcdc4"; dcdc4-supply = <0x00000062>; }; virtual-rtcldo { compatible = "xpower-vregulator,rtcldo"; rtcldo-supply = <0x00000063>; }; virtual-aldo1 { compatible = "xpower-vregulator,aldo1"; aldo1-supply = <0x00000064>; }; virtual-aldo2 { compatible = "xpower-vregulator,aldo2"; aldo2-supply = <0x00000054>; }; virtual-aldo3 { compatible = "xpower-vregulator,aldo3"; aldo3-supply = <0x00000065>; }; virtual-aldo4 { compatible = "xpower-vregulator,aldo4"; aldo4-supply = <0x00000066>; }; virtual-bldo1 { compatible = "xpower-vregulator,bldo1"; bldo1-supply = <0x00000067>; }; virtual-bldo2 { compatible = "xpower-vregulator,bldo2"; bldo2-supply = <0x00000068>; }; virtual-bldo3 { compatible = "xpower-vregulator,bldo3"; bldo3-supply = <0x00000069>; }; virtual-bldo4 { compatible = "xpower-vregulator,bldo4"; bldo4-supply = <0x0000006a>; }; virtual-cldo1 { compatible = "xpower-vregulator,cldo1"; cldo1-supply = <0x0000003f>; }; virtual-cldo2 { compatible = "xpower-vregulator,cldo2"; cldo2-supply = <0x0000004f>; }; virtual-cldo3 { compatible = "xpower-vregulator,cldo3"; cldo3-supply = <0x0000002d>; }; virtual-cldo4 { compatible = "xpower-vregulator,cldo4"; cldo4-supply = <0x0000006b>; }; virtual-cpusldo { compatible = "xpower-vregulator,cpusldo"; cpusldo-supply = <0x0000006c>; }; virtual-drivevbus { compatible = "xpower-vregulator,drivevbus"; drivevbus-supply = <0x0000006d>; }; axp_gpio@0 { gpio-controller; #size-cells = <0x00000000>; #gpio-cells = <0x00000006>; status = "okay"; phandle = <0x00000148>; }; }; }; s_twi@7081800 { #address-cells = <0x00000001>; #size-cells = <0x00000000>; compatible = "allwinner,sun50i-twi"; reg = <0x00000000 0x07081800 0x00000000 0x00000200>; interrupts = <0x00000000 0x00000072 0x00000004>; clocks = <0x00000024 0x0000000b>; resets = <0x00000024 0x00000005>; clock-names = "bus"; clock-frequency = <0x00030d40>; pinctrl-names = "default", "sleep"; pinctrl-0 = <0x0000006e>; status = "disabled"; phandle = <0x00000149>; }; pwm@300a000 { #pwm-cells = <0x00000003>; compatible = "allwinner,sunxi-pwm"; reg = <0x00000000 0x0300a000 0x00000000 0x000003ff>; clocks = <0x00000015 0x00000036>; resets = <0x00000015 0x0000000e>; pwm-number = <0x0000000a>; pwm-base = <0x00000000>; sunxi-pwms = <0x0000006f 0x00000070 0x00000071 0x00000072 0x00000073 0x00000074 0x00000075 0x00000076 0x00000077 0x00000078>; phandle = <0x0000014a>; }; pwm0@300a010 { compatible = "allwinner,sunxi-pwm0"; pinctrl-names = "active", "sleep"; reg = <0x00000000 0x0300a010 0x00000000 0x00000004>; reg_base = <0x0300a000>; pinctrl-0 = <0x00000079>; pinctrl-1 = <0x0000007a>; phandle = <0x0000006f>; }; pwm1@300a011 { compatible = "allwinner,sunxi-pwm1"; pinctrl-names = "active", "sleep"; reg = <0x00000000 0x0300a011 0x00000000 0x00000004>; reg_base = <0x0300a000>; pinctrl-0 = <0x0000007b>; pinctrl-1 = <0x0000007c>; phandle = <0x00000070>; }; pwm2@300a012 { compatible = "allwinner,sunxi-pwm2"; pinctrl-names = "active", "sleep"; reg = <0x00000000 0x0300a012 0x00000000 0x00000004>; reg_base = <0x0300a000>; phandle = <0x00000071>; }; pwm3@300a013 { compatible = "allwinner,sunxi-pwm3"; pinctrl-names = "active", "sleep"; reg = <0x00000000 0x0300a013 0x00000000 0x00000004>; reg_base = <0x0300a000>; phandle = <0x00000072>; }; pwm4@300a014 { compatible = "allwinner,sunxi-pwm4"; pinctrl-names = "active", "sleep"; reg = <0x00000000 0x0300a014 0x00000000 0x00000004>; reg_base = <0x0300a000>; phandle = <0x00000073>; }; pwm5@300a015 { compatible = "allwinner,sunxi-pwm5"; pinctrl-names = "active", "sleep"; reg = <0x00000000 0x0300a015 0x00000000 0x00000004>; reg_base = <0x0300a000>; phandle = <0x00000074>; }; pwm6@300a016 { compatible = "allwinner,sunxi-pwm6"; pinctrl-names = "active", "sleep"; reg = <0x00000000 0x0300a016 0x00000000 0x00000004>; reg_base = <0x0300a000>; phandle = <0x00000075>; }; pwm7@300a017 { compatible = "allwinner,sunxi-pwm7"; pinctrl-names = "active", "sleep"; reg = <0x00000000 0x0300a017 0x00000000 0x00000004>; reg_base = <0x0300a000>; phandle = <0x00000076>; }; pwm8@300a018 { compatible = "allwinner,sunxi-pwm8"; pinctrl-names = "active", "sleep"; reg = <0x00000000 0x0300a018 0x00000000 0x00000004>; reg_base = <0x0300a000>; phandle = <0x00000077>; }; pwm9@300a019 { compatible = "allwinner,sunxi-pwm9"; pinctrl-names = "active", "sleep"; reg = <0x00000000 0x0300a019 0x00000000 0x00000004>; reg_base = <0x0300a000>; phandle = <0x00000078>; }; vind@2000800 { compatible = "allwinner,sunxi-vin-media", "simple-bus"; #address-cells = <0x00000002>; #size-cells = <0x00000002>; ranges; device_id = <0x00000000>; csi_top = <0x1406f400>; csi_isp = <0x11e1a300>; reg = <0x00000000 0x02000800 0x00000000 0x00000200 0x00000000 0x02000000 0x00000000 0x00000800 0x00000000 0x0200a000 0x00000000 0x00000100>; clocks = * 0xbbe865ec [0x00000060]; clock-names = "csi_top", "csi_top_src", "csi_mclk0", "csi_mclk0_24m", "csi_mclk0_pll", "csi_mclk1", "csi_mclk1_24m", "csi_mclk1_pll", "csi_isp", "csi_isp_src", "csi_bus", "csi_mbus", "csi_isp_mbus"; resets = <0x00000015 0x00000042 0x00000015 0x00000043>; reset-names = "csi_ret", "isp_ret"; pinctrl-names = "mclk0-default", "mclk0-sleep", "mclk1-default", "mclk1-sleep"; pinctrl-0 = <0x0000007d>; pinctrl-1 = <0x0000007e>; pinctrl-2 = <0x0000007f>; pinctrl-3 = <0x00000080>; status = "okay"; phandle = <0x0000014b>; csi@2001000 { compatible = "allwinner,sunxi-csi"; reg = <0x00000000 0x02001000 0x00000000 0x00001000>; interrupts = <0x00000000 0x0000004b 0x00000004>; device_id = <0x00000000>; iommus = <0x00000081 0x00000003 0x00000001>; phandle = <0x0000014c>; }; csi@2002000 { compatible = "allwinner,sunxi-csi"; reg = <0x00000000 0x02002000 0x00000000 0x00001000>; interrupts = <0x00000000 0x0000004c 0x00000004>; device_id = <0x00000001>; iommus = <0x00000081 0x00000003 0x00000001>; phandle = <0x0000014d>; }; mipi@200a100 { compatible = "allwinner,sunxi-mipi"; reg = <0x00000000 0x0200a100 0x00000000 0x00000100 0x00000000 0x0200b000 0x00000000 0x00000400>; interrupts = <0x00000000 0x00000050 0x00000004>; device_id = <0x00000000>; phandle = <0x0000014e>; }; mipi@200a200 { compatible = "allwinner,sunxi-mipi"; reg = <0x00000000 0x0200a200 0x00000000 0x00000100 0x00000000 0x0200b400 0x00000000 0x00000400>; device_id = <0x00000001>; phandle = <0x0000014f>; }; tdm@2108000 { compatible = "allwinner,sunxi-tdm"; reg = <0x00000000 0x02108000 0x00000000 0x00000180>; interrupts = <0x00000000 0x0000004f 0x00000004>; device_id = <0x00000000>; iommus = <0x00000081 0x00000004 0x00000001>; phandle = <0x00000150>; }; isp@2100000 { compatible = "allwinner,sunxi-isp"; reg = <0x00000000 0x02100000 0x00000000 0x00002000>; interrupts = <0x00000000 0x0000004d 0x00000004>; device_id = <0x00000000>; iommus = <0x00000081 0x00000004 0x00000001>; phandle = <0x00000151>; }; isp@2102000 { compatible = "allwinner,sunxi-isp"; reg = <0x00000000 0x02102000 0x00000000 0x00002000>; interrupts = <0x00000000 0x0000004e 0x00000004>; device_id = <0x00000001>; iommus = <0x00000081 0x00000004 0x00000001>; phandle = <0x00000152>; }; scaler@2110000 { compatible = "allwinner,sunxi-scaler"; reg = <0x00000000 0x02110000 0x00000000 0x00000400>; device_id = <0x00000000>; iommus = <0x00000081 0x00000003 0x00000001>; phandle = <0x00000153>; }; scaler@2110400 { compatible = "allwinner,sunxi-scaler"; reg = <0x00000000 0x02110400 0x00000000 0x00000400>; device_id = <0x00000001>; iommus = <0x00000081 0x00000003 0x00000001>; phandle = <0x00000154>; }; scaler@2110800 { compatible = "allwinner,sunxi-scaler"; reg = <0x00000000 0x02110800 0x00000000 0x00000400>; device_id = <0x00000002>; iommus = <0x00000081 0x00000003 0x00000001>; phandle = <0x00000155>; }; scaler@2110c00 { compatible = "allwinner,sunxi-scaler"; reg = <0x00000000 0x02110c00 0x00000000 0x00000400>; device_id = <0x00000003>; iommus = <0x00000081 0x00000003 0x00000001>; phandle = <0x00000156>; }; actuator@2108180 { compatible = "allwinner,sunxi-actuator"; device_type = "actuator0"; reg = <0x00000000 0x02108180 0x00000000 0x00000010>; actuator0_name = "dw9714_act"; actuator0_slave = <0x00000018>; actuator0_af_pwdn; actuator0_afvdd = "afvcc-csi"; actuator0_afvdd_vol = <0x002ab980>; status = "disabled"; phandle = <0x00000084>; }; flash@2108190 { device_type = "flash0"; compatible = "allwinner,sunxi-flash"; reg = <0x00000000 0x02108190 0x00000000 0x00000010>; flash0_type = <0x00000002>; flash0_en = <0x00000082 0x00000000 0x0000000b 0x00000001>; flash0_mode; flash0_flvdd = ""; flash0_flvdd_vol; device_id = <0x00000000>; status = "disabled"; phandle = <0x00000083>; }; sensor@200b800 { reg = <0x00000000 0x0200b800 0x00000000 0x00000010>; device_type = "sensor0"; compatible = "allwinner,sunxi-sensor"; sensor0_mname = "gc02m2_mipi"; sensor0_twi_cci_id = <0x00000002>; sensor0_twi_addr = <0x0000006e>; sensor0_mclk_id = <0x00000000>; sensor0_pos = "rear"; sensor0_isp_used = <0x00000001>; sensor0_fmt = <0x00000001>; sensor0_stby_mode = <0x00000000>; sensor0_vflip = <0x00000001>; sensor0_hflip = <0x00000001>; sensor0_iovdd-supply = <0x00000054>; sensor0_iovdd_vol = <0x002ab980>; sensor0_avdd-supply = <0x00000064>; sensor0_avdd_vol = <0x002ab980>; sensor0_dvdd-supply = <0x0000006a>; sensor0_dvdd_vol = <0x00124f80>; sensor0_power_en = <0x00000045 0x00000004 0x00000006 0x00000001>; sensor0_reset = <0x00000045 0x00000004 0x00000009 0x00000001>; sensor0_pwdn = <0x00000045 0x00000004 0x00000008 0x00000001>; sensor0_sm_vs; flash_handle = <0x00000083>; act_handle = <0x00000084>; device_id = <0x00000000>; sensor0_cameravdd-supply = <0x00000054>; sensor0_cameravdd_vol = <0x002ab980>; status = "okay"; phandle = <0x00000157>; }; sensor@200b810 { reg = <0x00000000 0x0200b810 0x00000000 0x00000010>; device_type = "sensor1"; compatible = "allwinner,sunxi-sensor"; sensor1_mname = "gc030a_mipi"; sensor1_twi_cci_id = <0x00000002>; sensor1_twi_addr = <0x00000042>; sensor1_mclk_id = <0x00000000>; sensor1_pos = "front"; sensor1_isp_used = <0x00000001>; sensor1_fmt = <0x00000001>; sensor1_stby_mode = <0x00000000>; sensor1_vflip = <0x00000000>; sensor1_hflip = <0x00000000>; sensor1_iovdd-supply = <0x00000054>; sensor1_iovdd_vol = <0x002ab980>; sensor1_avdd-supply = <0x00000064>; sensor1_avdd_vol = <0x002ab980>; sensor1_dvdd-supply = <0x0000006a>; sensor1_dvdd_vol = <0x00124f80>; sensor1_power_en; sensor1_reset = <0x00000045 0x00000004 0x00000007 0x00000001>; sensor1_pwdn = <0x00000045 0x00000004 0x00000006 0x00000001>; sensor1_sm_vs; flash_handle; act_handle; device_id = <0x00000001>; status = "okay"; phandle = <0x00000158>; }; vinc@2009000 { compatible = "allwinner,sunxi-vin-core"; device_type = "vinc0"; reg = <0x00000000 0x02009000 0x00000000 0x00000200>; interrupts = <0x00000000 0x00000047 0x00000004>; vinc0_csi_sel = <0x00000000>; vinc0_mipi_sel = <0x00000000>; vinc0_isp_sel = <0x00000000>; vinc0_tdm_rx_sel = <0x000000ff>; vinc0_rear_sensor_sel = <0x00000000>; vinc0_front_sensor_sel = <0x00000001>; vinc0_sensor_list = <0x00000000>; device_id = <0x00000000>; iommus = <0x00000081 0x00000003 0x00000001>; vinc0_isp_tx_ch = <0x00000000>; status = "okay"; phandle = <0x00000159>; }; vinc@2009200 { device_type = "vinc1"; compatible = "allwinner,sunxi-vin-core"; reg = <0x00000000 0x02009200 0x00000000 0x00000200>; interrupts = <0x00000000 0x00000048 0x00000004>; vinc1_csi_sel = <0x00000000>; vinc1_mipi_sel = <0x00000000>; vinc1_isp_sel = <0x00000000>; vinc1_tdm_rx_sel = <0x000000ff>; vinc1_rear_sensor_sel = <0x00000000>; vinc1_front_sensor_sel = <0x00000001>; vinc1_sensor_list = <0x00000000>; device_id = <0x00000001>; iommus = <0x00000081 0x00000003 0x00000001>; vinc1_isp_tx_ch = <0x00000000>; status = "okay"; phandle = <0x0000015a>; }; vinc@2009400 { device_type = "vinc2"; compatible = "allwinner,sunxi-vin-core"; reg = <0x00000000 0x02009400 0x00000000 0x00000200>; interrupts = <0x00000000 0x00000049 0x00000004>; vinc2_csi_sel = <0x00000001>; vinc2_mipi_sel = <0x00000001>; vinc2_isp_sel = <0x00000000>; vinc2_tdm_rx_sel = <0x000000ff>; vinc2_rear_sensor_sel = <0x00000000>; vinc2_front_sensor_sel = <0x00000001>; vinc2_sensor_list = <0x00000000>; device_id = <0x00000002>; iommus = <0x00000081 0x00000003 0x00000001>; vinc2_isp_tx_ch = <0x00000000>; status = "okay"; phandle = <0x0000015b>; }; vinc@2009600 { device_type = "vinc3"; compatible = "allwinner,sunxi-vin-core"; reg = <0x00000000 0x02009600 0x00000000 0x00000200>; interrupts = <0x00000000 0x0000004a 0x00000004>; vinc3_csi_sel = <0x00000001>; vinc3_mipi_sel = <0x00000001>; vinc3_isp_sel = <0x00000000>; vinc3_tdm_rx_sel = <0x000000ff>; vinc3_rear_sensor_sel = <0x00000000>; vinc3_front_sensor_sel = <0x00000001>; vinc3_sensor_list = <0x00000000>; device_id = <0x00000003>; iommus = <0x00000081 0x00000003 0x00000001>; vinc3_isp_tx_ch = <0x00000000>; status = "okay"; phandle = <0x0000015c>; }; }; keyboard@5070800 { compatible = "allwinner,keyboard_1350mv"; reg = <0x00000000 0x05070800 0x00000000 0x00000400>; interrupts = <0x00000000 0x00000016 0x00000001>; clocks = <0x00000015 0x00000081>; resets = <0x00000015 0x00000039>; key_cnt = <0x00000003>; key0 = <0x000001db 0x00007372>; key1 = <0x00000286 0x00000073>; key2 = <0x00000384 0x00000072>; key3 = <0x000002ee 0x0000001c>; key4 = <0x00000370 0x00000066>; status = "okay"; phandle = <0x0000015d>; }; spi@5010000 { #address-cells = <0x00000001>; #size-cells = <0x00000000>; compatible = "allwinner,sun50i-spi"; device_type = "spi0"; reg = <0x00000000 0x05010000 0x00000000 0x00001000>; interrupts = <0x00000000 0x0000000d 0x00000004>; clocks = <0x00000015 0x00000003 0x00000015 0x00000058 0x00000015 0x0000005b>; clock-names = "pll", "mod", "bus"; resets = <0x00000015 0x00000022>; clock-frequency = <0x05f5e100>; pinctrl-names = "default", "sleep"; pinctrl-0 = <0x00000085 0x00000086>; pinctrl-1 = <0x00000087>; spi0_cs_number = <0x00000001>; spi0_cs_bitmap = <0x00000001>; dmas = <0x00000055 0x00000016 0x00000055 0x00000016>; dma-names = "tx", "rx"; status = "disabled"; spi_slave_mode = <0x00000000>; phandle = <0x0000015e>; }; spi@5011000 { #address-cells = <0x00000001>; #size-cells = <0x00000000>; compatible = "allwinner,sun50i-spi"; device_type = "spi1"; reg = <0x00000000 0x05011000 0x00000000 0x00001000>; interrupts = <0x00000000 0x0000000e 0x00000004>; clocks = <0x00000015 0x00000003 0x00000015 0x00000059 0x00000015 0x0000005c>; clock-names = "pll", "mod", "bus"; resets = <0x00000015 0x00000023>; clock-frequency = <0x05f5e100>; pinctrl-names = "default", "sleep"; pinctrl-0 = <0x00000088 0x00000089>; pinctrl-1 = <0x0000008a>; spi1_cs_number = <0x00000001>; spi1_cs_bitmap = <0x00000001>; dmas = <0x00000055 0x00000017 0x00000055 0x00000017>; dma-names = "tx", "rx"; status = "disabled"; spi_slave_mode = <0x00000000>; phandle = <0x0000015f>; }; spi@5012000 { #address-cells = <0x00000001>; #size-cells = <0x00000000>; compatible = "allwinner,sun50i-spi"; device_type = "spi2"; reg = <0x00000000 0x05012000 0x00000000 0x00001000>; interrupts = <0x00000000 0x0000000f 0x00000004>; clocks = <0x00000015 0x00000003 0x00000015 0x0000005a 0x00000015 0x0000005d>; clock-names = "pll", "mod", "bus"; resets = <0x00000015 0x00000024>; clock-frequency = <0x05f5e100>; pinctrl-names = "default", "sleep"; pinctrl-0 = <0x0000008b 0x0000008c>; pinctrl-1 = <0x0000008d>; spi2_cs_number = <0x00000001>; spi2_cs_bitmap = <0x00000001>; dmas = <0x00000055 0x00000018 0x00000055 0x00000018>; dma-names = "tx", "rx"; status = "disabled"; spi_slave_mode = <0x00000000>; phandle = <0x00000160>; }; ledc@0x5018000 { #address-cells = <0x00000001>; #size-cells = <0x00000000>; compatible = "allwinner,sunxi-leds"; reg = <0x00000000 0x05018000 0x00000000 0x00000100>; interrupts = <0x00000000 0x00000023 0x00000004>; interrupt-names = "ledcirq"; clocks = <0x00000015 0x0000008a 0x00000015 0x0000008b>; clock-names = "clk_ledc", "clk_cpuapb"; pinctrl-0 = <0x0000008e>; pinctrl-1 = <0x0000008f>; pinctrl-names = "default", "sleep"; dmas = <0x00000055 0x00000000 0x00000055 0x0000000b>; dma-names = "rx", "tx"; resets = <0x00000015 0x00000041>; reset-names = "ledc_reset"; status = "disable"; phandle = <0x00000161>; }; usbc0@10 { device_type = "usbc0"; compatible = "allwinner,sunxi-otg-manager"; reg = <0x00000000 0x00000010 0x00000000 0x00001000>; usb_port_type = <0x00000002>; usb_detect_type = <0x00000002>; usb_id_gpio = <0x00000045 0x00000007 0x00000008 0x00000000>; usb_det_vbus_gpio = "axp_ctrl"; usb_wakeup_suspend = <0x00000000>; usb_serial_unique = <0x00000000>; usb_serial_number = "20080411"; rndis_wceis = <0x00000001>; usb_detect_mode = <0x00000000>; enable-active-high; det_vbus_supply = <0x00000090>; usbc-supply = <0x0000002d>; status = "okay"; phandle = <0x00000162>; }; udc-controller@5100000 { compatible = "allwinner,sunxi-udc"; reg = <0x00000000 0x05100000 0x00000000 0x00001000 0x00000000 0x00000000 0x00000000 0x00000100 0x00000000 0x05200000 0x00000000 0x00001000>; interrupts = <0x00000000 0x00000020 0x00000004>; clocks = <0x00000015 0x00000080 0x00000015 0x00000079>; clock-names = "bus_otg", "phy"; resets = <0x00000015 0x00000038 0x00000015 0x00000032>; reset-names = "otg", "phy"; det_vbus_supply = <0x00000090>; udc-supply = <0x0000002d>; phandle = <0x00000163>; }; ehci0-controller@5101000 { compatible = "allwinner,sunxi-ehci0"; reg = * 0xbbe88504 [0x00000060]; interrupts = <0x00000000 0x0000001e 0x00000004>; clocks = <0x00000015 0x0000007e 0x00000015 0x00000079>; clock-names = "bus_hci", "phy"; resets = <0x00000015 0x00000036 0x00000015 0x00000032>; reset-names = "hci", "phy"; hci_ctrl_no = <0x00000000>; drvvbus-supply = <0x0000006d>; hci-supply = <0x0000002d>; phandle = <0x00000164>; }; ohci0-controller@5101400 { compatible = "allwinner,sunxi-ohci0"; reg = * 0xbbe88674 [0x00000060]; interrupts = <0x00000000 0x0000001f 0x00000004>; clocks = <0x00000015 0x0000007c 0x00000015 0x00000078 0x00000015 0x00000079>; clock-names = "bus_hci", "ohci", "phy"; resets = <0x00000015 0x00000034 0x00000015 0x00000032>; reset-names = "hci", "phy"; hci_ctrl_no = <0x00000000>; drvvbus-supply = <0x0000006d>; hci-supply = <0x0000002d>; phandle = <0x00000165>; }; usbc1@11 { device_type = "usbc1"; reg = <0x00000000 0x00000011 0x00000000 0x00001000>; usb_wakeup_suspend = <0x00000000>; usb_regulator_io = "nocare"; status = "disable"; phandle = <0x00000166>; }; ehci1-controller@5200000 { compatible = "allwinner,sunxi-ehci1"; reg = <0x00000000 0x05200000 0x00000000 0x00000fff 0x00000000 0x00000000 0x00000000 0x00000100 0x00000000 0x05100000 0x00000000 0x00001000 0x00000000 0x07010250 0x00000000 0x00000010>; interrupts = <0x00000000 0x00000021 0x00000004>; clocks = <0x00000015 0x0000007f 0x00000015 0x0000007b>; clock-names = "bus_hci", "phy"; resets = <0x00000015 0x00000037 0x00000015 0x00000033>; reset-names = "hci", "phy"; hci_ctrl_no = <0x00000001>; drvvbus-supply = <0x00000091>; phandle = <0x00000167>; }; ohci1-controller@5200400 { compatible = "allwinner,sunxi-ohci1"; reg = <0x00000000 0x05200400 0x00000000 0x00000fff 0x00000000 0x00000000 0x00000000 0x00000100 0x00000000 0x05100000 0x00000000 0x00001000 0x00000000 0x07010250 0x00000000 0x00000010>; interrupts = <0x00000000 0x00000022 0x00000004>; clocks = <0x00000015 0x0000007d 0x00000015 0x0000007a 0x00000015 0x0000007b>; clock-names = "bus_hci", "ohci", "phy"; resets = <0x00000015 0x00000035 0x00000015 0x00000033>; reset-names = "hci", "phy"; hci_ctrl_no = <0x00000001>; drvvbus-supply = <0x00000091>; phandle = <0x00000168>; }; disp1@1 { compatible = "allwinner,sunxi-disp"; iommus = <0x00000081 0x00000001 0x00000000>; phandle = <0x00000169>; }; disp@6000000 { boot_fb0 = "bbf299c0,320,500,20,c80,0,0,320,500"; compatible = "allwinner,sunxi-disp"; reg = * 0xbbe88b90 [0x00000070]; interrupts = <0x00000000 0x00000045 0x00000004 0x00000000 0x00000046 0x00000004 0x00000000 0x00000044 0x00000004>; clocks = * 0xbbe88c3c [0x00000068]; clock-names = "clk_de0", "clk_de1", "clk_bus_de0", "clk_bus_de1", "clk_bus_dpss_top0", "clk_bus_dpss_top1", "clk_mipi_dsi0", "clk_bus_mipi_dsi0", "clk_tcon0", "clk_tcon1", "clk_bus_tcon0", "clk_bus_tcon1", "clk_pll_com"; resets = * 0xbbe88d64 [0x00000048]; reset-names = "rst_bus_de0", "rst_bus_de1", "rst_bus_dpss_top0", "rst_bus_dpss_top1", "rst_bus_mipi_dsi0", "rst_bus_tcon0", "rst_bus_tcon1", "rst_bus_lvds0", "rst_bus_lvds1"; assigned-clocks = <0x00000015 0x00000020 0x00000015 0x00000021 0x00000015 0x00000084 0x00000015 0x00000086 0x00000015 0x00000087>; assigned-clock-parents = <0x00000015 0x00000004 0x00000015 0x00000004 0x00000015 0x00000003 0x00000015 0x0000000a 0x00000015 0x0000000d>; assigned-clock-rates = <0x11e1a300 0x11e1a300 0x00000000 0x00000000 0x00000000>; boot_disp = <0x00000104>; boot_disp1 = <0x01040000>; boot_disp2 = <0x00000004>; fb_base = <0x00000000>; iommus = <0x00000081 0x00000000 0x00000000>; disp_init_enable = <0x00000001>; disp_mode = <0x00000000>; screen0_output_type = <0x00000001>; screen0_output_mode = <0x00000004>; screen1_output_type = <0x00000001>; screen1_output_mode = <0x00000004>; screen1_output_format = <0x00000000>; screen1_output_bits = <0x00000000>; screen1_output_eotf = <0x00000004>; screen1_output_cs = <0x00000101>; screen1_output_dvi_hdmi = <0x00000002>; screen1_output_range = <0x00000002>; screen1_output_scan = <0x00000000>; screen1_output_aspect_ratio = <0x00000008>; dev0_output_type = <0x00000001>; dev0_output_mode = <0x00000004>; dev0_screen_id = <0x00000000>; dev0_do_hpd = <0x00000000>; dev1_output_type = <0x00000004>; dev1_output_mode = <0x0000000a>; dev1_screen_id = <0x00000001>; dev1_do_hpd = <0x00000001>; def_output_dev = <0x00000000>; hdmi_mode_check = <0x00000001>; fb0_format = <0x00000000>; fb0_width = <0x00000320>; fb0_height = <0x00000500>; fb1_format = <0x00000000>; fb1_width = <0x00000000>; fb1_height = <0x00000000>; chn_cfg_mode = <0x00000001>; disp_para_zone = <0x00000001>; dc1sw-supply = <0x0000006b>; dcdc1-supply = <0x0000002d>; phandle = <0x0000016a>; }; uboot_disp@06100000 { compatible = "allwinner,sunxi-disp"; reg = * 0xbbe8919c [0x00000070]; interrupts = <0x00000000 0x00000045 0x00000004 0x00000000 0x00000046 0x00000004 0x00000000 0x00000044 0x00000004>; clocks = <0x0000000d 0x0000000e 0x00000092 0x00000093 0x00000094 0x00000012 0x00000013 0x00000095 0x00000096 0x00000014>; boot_disp = <0x00000000>; boot_disp1 = <0x00000000>; boot_disp2 = <0x00000000>; fb_base = <0x00000000>; iommus = <0x00000081 0x00000000 0x00000000>; phandle = <0x0000016b>; }; lcd0_1@1c0c000 { lcd_used = <0x00000001>; lcd_driver_name = "C69500_01"; lcd_backlight = <0x00000032>; lcd_if = <0x00000004>; lcd_x = <0x00000320>; lcd_y = <0x00000500>; lcd_width = <0x0000006c>; lcd_height = <0x000000ac>; lcd_dclk_freq = <0x00000044>; lcd_pwm_used = <0x00000001>; lcd_pwm_ch = <0x00000000>; lcd_pwm_freq = <0x0000c350>; lcd_pwm_pol = <0x00000001>; lcd_pwm_max_limit = <0x000000ff>; lcd_hbp = <0x00000032>; lcd_ht = <0x0000036b>; lcd_hspw = <0x00000019>; lcd_vbp = <0x0000000c>; lcd_vt = <0x00000518>; lcd_vspw = <0x00000002>; lcd_frm = <0x00000000>; lcd_gamma_en = <0x00000000>; lcd_bright_curve_en = <0x00000000>; lcd_cmap_en = <0x00000000>; deu_mode = <0x00000000>; lcdgamma4iep = <0x00000016>; smart_color = <0x0000005a>; lcd_dsi_if = <0x00000000>; lcd_dsi_lane = <0x00000004>; lcd_dsi_format = <0x00000000>; lcd_dsi_te = <0x00000000>; lcd_dsi_eotp = <0x00000000>; lcd_pin_power = "dcdc1"; lcd_pin_power1 = "eldo3"; lcd_power = "dc1sw"; lcd_bl_en = <0x00000045 0x00000001 0x00000008 0x00000000>; lcd_gpio_0 = <0x00000045 0x00000003 0x00000016 0x00000000>; pinctrl-0 = <0x00000097>; pinctrl-1 = <0x00000098>; phandle = <0x0000016c>; }; lcd0_2@1c0c000 { lcd_used = <0x00000001>; lcd_driver_name = "K080_IM2AYC805_R_800x1280"; lcd_backlight = <0x00000032>; lcd_if = <0x00000004>; lcd_x = <0x00000320>; lcd_y = <0x00000500>; lcd_width = <0x0000006c>; lcd_height = <0x000000ac>; lcd_dclk_freq = <0x00000044>; lcd_pwm_used = <0x00000001>; lcd_pwm_ch = <0x00000000>; lcd_pwm_freq = <0x0000c350>; lcd_pwm_pol = <0x00000001>; lcd_pwm_max_limit = <0x000000ff>; lcd_hbp = <0x00000024>; lcd_ht = <0x00000356>; lcd_hspw = <0x00000012>; lcd_vbp = <0x0000000c>; lcd_vt = <0x00000528>; lcd_vspw = <0x00000004>; lcd_frm = <0x00000000>; lcd_gamma_en = <0x00000000>; lcd_bright_curve_en = <0x00000000>; lcd_cmap_en = <0x00000000>; deu_mode = <0x00000000>; lcdgamma4iep = <0x00000016>; smart_color = <0x0000005a>; lcd_dsi_if = <0x00000000>; lcd_dsi_lane = <0x00000004>; lcd_dsi_format = <0x00000000>; lcd_dsi_te = <0x00000000>; lcd_dsi_eotp = <0x00000000>; lcd_pin_power = "dcdc1"; lcd_pin_power1 = "eldo3"; lcd_power = "dc1sw"; lcd_bl_en = <0x00000045 0x00000001 0x00000008 0x00000000>; lcd_gpio_0 = <0x00000045 0x00000003 0x00000016 0x00000000>; pinctrl-0 = <0x00000097>; pinctrl-1 = <0x00000098>; phandle = <0x0000016d>; }; lcd0_3@1c0c000 { lcd_used = <0x00000001>; lcd_driver_name = "K101_IM2BYL02_L_800X1280"; lcd_backlight = <0x00000032>; lcd_if = <0x00000004>; lcd_x = <0x00000320>; lcd_y = <0x00000500>; lcd_width = <0x0000006c>; lcd_height = <0x000000ac>; lcd_dclk_freq = <0x00000048>; lcd_pwm_used = <0x00000001>; lcd_pwm_ch = <0x00000000>; lcd_pwm_freq = <0x0000c350>; lcd_pwm_pol = <0x00000001>; lcd_pwm_max_limit = <0x000000ff>; lcd_hbp = <0x00000050>; lcd_ht = <0x00000384>; lcd_hspw = <0x0000000e>; lcd_vbp = <0x0000001c>; lcd_vt = <0x00000572>; lcd_vspw = <0x00000008>; lcd_frm = <0x00000000>; lcd_gamma_en = <0x00000000>; lcd_bright_curve_en = <0x00000000>; lcd_cmap_en = <0x00000000>; deu_mode = <0x00000000>; lcdgamma4iep = <0x00000016>; smart_color = <0x0000005a>; lcd_dsi_if = <0x00000000>; lcd_dsi_lane = <0x00000004>; lcd_dsi_format = <0x00000000>; lcd_dsi_te = <0x00000000>; lcd_dsi_eotp = <0x00000000>; lcd_pin_power = "dcdc1"; lcd_pin_power1 = "eldo3"; lcd_power = "dc1sw"; lcd_bl_en = <0x00000045 0x00000001 0x00000008 0x00000000>; lcd_gpio_0 = <0x00000045 0x00000003 0x00000016 0x00000000>; pinctrl-0 = <0x00000097>; pinctrl-1 = <0x00000098>; phandle = <0x0000016e>; }; lcd0@1c0c000 { compatible = "allwinner,sunxi-lcd0"; reg = <0x00000000 0x01c0c000 0x00000000 0x00000000>; pinctrl-names = "active", "sleep"; lcd_used = <0x00000001>; lcd_driver_name = "K080_IM2AYC805_R_800x1280"; lcd_backlight = <0x00000032>; lcd_if = <0x00000004>; lcd_x = <0x00000320>; lcd_y = <0x00000500>; lcd_width = <0x0000006c>; lcd_height = <0x000000ac>; lcd_dclk_freq = <0x00000044>; lcd_pwm_used = <0x00000001>; lcd_pwm_ch = <0x00000000>; lcd_pwm_freq = <0x0000c350>; lcd_pwm_pol = <0x00000001>; lcd_pwm_max_limit = <0x000000ff>; lcd_hbp = <0x00000024>; lcd_ht = <0x00000356>; lcd_hspw = <0x00000012>; lcd_vbp = <0x0000000c>; lcd_vt = <0x00000528>; lcd_vspw = <0x00000004>; lcd_frm = <0x00000000>; lcd_gamma_en = <0x00000000>; lcd_bright_curve_en = <0x00000000>; lcd_cmap_en = <0x00000000>; deu_mode = <0x00000000>; lcdgamma4iep = <0x00000016>; smart_color = <0x0000005a>; lcd_dsi_if = <0x00000000>; lcd_dsi_lane = <0x00000004>; lcd_dsi_format = <0x00000000>; lcd_dsi_te = <0x00000000>; lcd_dsi_eotp = <0x00000000>; lcd_pin_power = "dcdc1"; lcd_pin_power1 = "eldo3"; lcd_power = "dc1sw"; lcd_bl_en = <0x00000045 0x00000001 0x00000008 0x00000000>; lcd_gpio_0 = <0x00000045 0x00000003 0x00000016 0x00000000>; pinctrl-0 = <0x00000097>; pinctrl-1 = <0x00000098>; phandle = <0x0000016d>; }; lcd1@1 { compatible = "allwinner,sunxi-lcd1"; reg = <0x00000000 0x01c0c000 0x00000000 0x00000000>; pinctrl-names = "active", "sleep"; phandle = <0x00000170>; }; eink@6400000 { compatible = "allwinner,sunxi-eink"; pinctrl-names = "active", "sleep"; reg = <0x00000000 0x06400000 0x00000000 0x0001ffff 0x00000000 0x06000000 0x00000000 0x003fffff>; interrupts = <0x00000000 0x0000005a 0x00000004 0x00000000 0x00000058 0x00000004>; clocks = <0x00000015 0x00000020 0x00000015 0x00000022 0x00000015 0x00000025 0x00000015 0x00000024 0x00000015 0x00000028>; clock-names = "de0", "bus_de0", "bus_eink", "eink", "eink_panel"; resets = <0x00000015 0x00000001 0x00000015 0x00000003>; reset-names = "rst_bus_de0", "rst_bus_eink"; iommus = <0x00000081 0x00000006 0x00000001>; phandle = <0x00000171>; }; uboot_eink@6400000 { compatible = "allwinner,sunxi-eink"; pinctrl-names = "active", "sleep"; reg = <0x00000000 0x06400000 0x00000000 0x0001ffff 0x00000000 0x06000000 0x00000000 0x003fffff>; interrupts = <0x00000000 0x0000005a 0x00000004 0x00000000 0x00000058 0x00000004>; clocks = <0x0000000d 0x00000010 0x00000011>; iommus = <0x00000081 0x00000006 0x00000001>; phandle = <0x00000172>; }; ve@1c0e000 { compatible = "allwinner,sunxi-cedar-ve"; reg = <0x00000000 0x01c0e000 0x00000000 0x00001000 0x00000000 0x03000000 0x00000000 0x00000010 0x00000000 0x03001000 0x00000000 0x00001000>; interrupts = <0x00000000 0x0000005e 0x00000004>; clocks = <0x00000015 0x0000002e 0x00000015 0x0000002d 0x00000015 0x00000039>; clock-names = "bus_ve", "ve", "mbus_ve"; resets = <0x00000015 0x00000007>; iommus = <0x00000081 0x00000002 0x00000001>; phandle = <0x00000173>; }; g2d@6480000 { compatible = "allwinner,sunxi-g2d"; reg = <0x00000000 0x06480000 0x00000000 0x0003ffff>; interrupts = <0x00000000 0x0000005b 0x00000004>; clocks = <0x00000015 0x00000027 0x00000015 0x00000026 0x00000015 0x0000003e>; clock-names = "bus", "g2d", "mbus_g2d"; resets = <0x00000015 0x00000004>; iommus = <0x00000081 0x00000005 0x00000001>; assigned-clocks = <0x00000015 0x00000026>; assigned-clock-rates = <0x11e1a300>; phandle = <0x00000174>; }; pinctrl_test@0 { reg = <0x00000000 0x00000000 0x00000000 0x00000000>; compatible = "allwinner,sunxi-pinctrl-test"; device_type = "pinctrl-test"; pinctrl-0 = <0x00000099>; pinctrl-1 = <0x0000009a>; pinctrl-names = "default", "sleep"; test-gpios = <0x00000045 0x00000001 0x00000002 0x00000001>; suspend-gpios = <0x00000082 0x00000000 0x00000004 0x00000001>; wakeup-source; interrupt-parent = <0x00000045>; interrupts = <0x00000001 0x00000003 0x00000004>; phandle = <0x00000175>; }; codec@5096000 { #sound-dai-cells = <0x00000000>; compatible = "allwinner,sunxi-internal-codec"; reg = <0x00000000 0x05096000 0x00000000 0x0000032c>; clocks = <0x00000015 0x00000017 0x00000015 0x00000074 0x00000015 0x00000075 0x00000015 0x00000015 0x00000015 0x00000016 0x00000015 0x00000077>; clock-names = "pll_audio", "codec_dac", "codec_adc", "pll_com", "pll_com_audio", "codec_bus"; resets = <0x00000015 0x00000031>; playback_cma = <0x00000080>; capture_cma = <0x00000100>; device_type = "codec"; mic1gain = <0x0000001f>; mic2gain = <0x0000001f>; adcdrc_cfg = <0x00000002>; adchpf_cfg = <0x00000001>; dacdrc_cfg = <0x00000002>; dachpf_cfg = <0x00000000>; digital_vol = <0x00000000>; dac_digital_vol = <0x00019c9c>; lineout_vol = <0x0000001a>; headphonegain = <0x00000000>; pa_level = <0x00000001>; pa_msleep_time = <0x00000078>; gpio-spk = <0x00000045 0x00000007 0x00000006 0x00000000>; avcc-supply = <0x00000066>; cpvin-supply = <0x0000003f>; status = "okay"; phandle = <0x0000009b>; }; dummy_cpudai@509632c { compatible = "allwinner,sunxi-dummy-cpudai"; reg = <0x00000000 0x0509632c 0x00000000 0x00000004>; tx_fifo_size = <0x00000080>; rx_fifo_size = <0x00000100>; dac_txdata = <0x05096020>; adc_txdata = <0x05096040>; playback_cma = <0x00000080>; capture_cma = <0x00000100>; device_type = "cpudai"; dmas = <0x00000055 0x00000007 0x00000055 0x00000007>; dma-names = "tx", "rx"; phandle = <0x0000009c>; }; sound@5096330 { compatible = "allwinner,sunxi-codec-machine"; reg = <0x00000000 0x05096330 0x00000000 0x00000004>; interrupts = <0x00000000 0x00000019 0x00000004>; hp_detect_case = <0x00000000>; sunxi,audio-codec = <0x0000009b>; sunxi,cpudai-controller = <0x0000009c>; device_type = "sndcodec"; status = "okay"; phandle = <0x00000176>; }; spdif@5094000 { #sound-dai-cells = <0x00000000>; compatible = "allwinner,sunxi-spdif"; reg = <0x00000000 0x05094000 0x00000000 0x00000040>; clocks = <0x00000015 0x00000017 0x00000015 0x00000070 0x00000015 0x00000071>; clock-names = "pll_audio", "spdif", "spdif_bus"; resets = <0x00000015 0x0000002f>; pinctrl-names = "default", "sleep"; pinctrl-0 = <0x0000009d>; pinctrl-1 = <0x0000009e>; clk_parent = <0x00000001>; playback_cma = <0x00000080>; capture_cma = <0x00000080>; device_type = "spdif"; dmas = <0x00000055 0x00000002 0x00000055 0x00000002>; dma-names = "tx", "rx"; status = "disabled"; phandle = <0x0000009f>; }; soundspdif@5094040 { reg = <0x00000000 0x05094040 0x00000000 0x00000004>; compatible = "sunxi,simple-audio-card"; simple-audio-card,name = "sndspdif"; phandle = <0x00000177>; simple-audio-card,cpu { sound-dai = <0x0000009f>; }; simple-audio-card,codec { }; }; dmic@5095000 { #sound-dai-cells = <0x00000000>; compatible = "allwinner,sunxi-dmic"; reg = <0x00000000 0x05095000 0x00000000 0x00000050>; clocks = <0x00000015 0x00000017 0x00000015 0x00000072 0x00000015 0x00000073>; clock-names = "pll_audio", "dmic", "dmic_bus"; resets = <0x00000015 0x00000030>; pinctrl-names = "default", "sleep"; pinctrl-0 = <0x000000a0>; pinctrl-1 = <0x000000a1>; clk_parent = <0x00000001>; capture_cma = <0x00000080>; data_vol = <0x000000b0>; dmic_rxsync_en = <0x00000000>; rx_chmap = <0x76543210>; device_type = "dmic"; dmas = <0x00000055 0x00000008>; dma-names = "rx"; status = "disabled"; phandle = <0x000000a2>; }; sound@5095050 { #sound-dai-cells = <0x00000000>; compatible = "dmic-codec"; reg = <0x00000000 0x05095050 0x00000000 0x00000004>; num-channels = <0x00000006>; status = "disabled"; phandle = <0x000000a3>; }; sounddmic@5095060 { reg = <0x00000000 0x05095060 0x00000000 0x00000004>; compatible = "sunxi,simple-audio-card"; simple-audio-card,name = "snddmic"; phandle = <0x00000178>; simple-audio-card,cpu { sound-dai = <0x000000a2>; }; simple-audio-card,codec { sound-dai = <0x000000a3>; }; }; daudio@5090000 { #sound-dai-cells = <0x00000000>; compatible = "allwinner,sunxi-daudio"; reg = <0x00000000 0x05090000 0x00000000 0x0000007c>; clocks = <0x00000015 0x00000017 0x00000015 0x00000068 0x00000015 0x0000006c>; clock-names = "pll_audio", "i2s0", "i2s0_bus"; resets = <0x00000015 0x0000002b>; pinctrl-names = "default", "sleep"; pinctrl-0 = <0x000000a4>; pinctrl-1 = <0x000000a5>; pinctrl_used = <0x00000001>; sign_extend = <0x00000000>; tx_data_mode = <0x00000000>; rx_data_mode = <0x00000000>; msb_lsb_first = <0x00000000>; daudio_rxsync_en = <0x00000000>; pcm_lrck_period = <0x00000080>; slot_width_select = <0x00000020>; frametype = <0x00000000>; tdm_config = <0x00000001>; tdm_num = <0x00000000>; mclk_div = <0x00000000>; clk_parent = <0x00000001>; capture_cma = <0x00000080>; playback_cma = <0x00000080>; tx_num = <0x00000004>; tx_chmap1 = <0x76543210>; tx_chmap0 = <0xfedcba98>; rx_num = <0x00000004>; rx_chmap3 = <0x03020100>; rx_chmap2 = <0x07060504>; rx_chmap1 = <0x0b0a0908>; rx_chmap0 = <0x0f0e0d0c>; device_type = "daudio0"; dmas = <0x00000055 0x00000003 0x00000055 0x00000003>; dma-names = "tx", "rx"; status = "disabled"; phandle = <0x000000a6>; }; sounddaudio0@509007c { reg = <0x00000000 0x0509007c 0x00000000 0x00000004>; compatible = "sunxi,simple-audio-card"; simple-audio-card,name = "snddaudio0"; simple-audio-card,format = "i2s"; status = "disabled"; phandle = <0x00000179>; simple-audio-card,cpu { sound-dai = <0x000000a6>; }; simple-audio-card,codec { phandle = <0x0000017a>; }; }; daudio@5091000 { #sound-dai-cells = <0x00000000>; compatible = "allwinner,sunxi-daudio"; reg = <0x00000000 0x05091000 0x00000000 0x0000007c>; clocks = <0x00000015 0x00000017 0x00000015 0x00000069 0x00000015 0x0000006d>; clock-names = "pll_audio", "i2s1", "i2s1_bus"; resets = <0x00000015 0x0000002c>; pinctrl-names = "default", "sleep"; pinctrl-0 = <0x000000a7>; pinctrl-1 = <0x000000a8>; pinctrl_used = <0x00000001>; sign_extend = <0x00000000>; tx_data_mode = <0x00000000>; rx_data_mode = <0x00000000>; msb_lsb_first = <0x00000000>; daudio_rxsync_en = <0x00000000>; pcm_lrck_period = <0x00000080>; slot_width_select = <0x00000020>; frametype = <0x00000000>; tdm_config = <0x00000001>; tdm_num = <0x00000001>; mclk_div = <0x00000000>; clk_parent = <0x00000001>; capture_cma = <0x00000080>; playback_cma = <0x00000080>; tx_num = <0x00000004>; tx_chmap1 = <0x76543210>; tx_chmap0 = <0xfedcba98>; rx_num = <0x00000004>; rx_chmap3 = <0x03020100>; rx_chmap2 = <0x07060504>; rx_chmap1 = <0x0b0a0908>; rx_chmap0 = <0x0f0e0d0c>; device_type = "daudio1"; dmas = <0x00000055 0x00000004 0x00000055 0x00000004>; dma-names = "tx", "rx"; status = "disabled"; phandle = <0x000000a9>; }; sounddaudio1@509107c { reg = <0x00000000 0x0509107c 0x00000000 0x00000004>; compatible = "sunxi,simple-audio-card"; simple-audio-card,name = "snddaudio1"; simple-audio-card,format = "i2s"; status = "disabled"; phandle = <0x0000017b>; simple-audio-card,cpu { sound-dai = <0x000000a9>; }; simple-audio-card,codec { phandle = <0x0000017c>; }; }; daudio@5092000 { #sound-dai-cells = <0x00000000>; compatible = "allwinner,sunxi-daudio"; reg = <0x00000000 0x05092000 0x00000000 0x0000007c>; clocks = <0x00000015 0x00000017 0x00000015 0x0000006a 0x00000015 0x0000006e>; clock-names = "pll_audio", "i2s2", "i2s2_bus"; resets = <0x00000015 0x0000002d>; pinctrl-names = "default", "sleep"; pinctrl-0 = <0x000000aa>; pinctrl-1 = <0x000000ab>; pinctrl_used = <0x00000001>; sign_extend = <0x00000000>; tx_data_mode = <0x00000000>; rx_data_mode = <0x00000000>; msb_lsb_first = <0x00000000>; daudio_rxsync_en = <0x00000000>; pcm_lrck_period = <0x00000080>; slot_width_select = <0x00000020>; frametype = <0x00000000>; tdm_config = <0x00000001>; tdm_num = <0x00000002>; mclk_div = <0x00000000>; clk_parent = <0x00000001>; capture_cma = <0x00000080>; playback_cma = <0x00000080>; tx_num = <0x00000004>; tx_chmap1 = <0x76543210>; tx_chmap0 = <0xfedcba98>; rx_num = <0x00000004>; rx_chmap3 = <0x03020100>; rx_chmap2 = <0x07060504>; rx_chmap1 = <0x0b0a0908>; rx_chmap0 = <0x0f0e0d0c>; device_type = "daudio2"; dmas = <0x00000055 0x00000005 0x00000055 0x00000005>; dma-names = "tx", "rx"; status = "disabled"; phandle = <0x000000ac>; }; sounddaudio2@509207c { reg = <0x00000000 0x0509207c 0x00000000 0x00000004>; compatible = "sunxi,simple-audio-card"; simple-audio-card,name = "snddaudio2"; simple-audio-card,format = "i2s"; status = "disabled"; phandle = <0x0000017d>; simple-audio-card,cpu { sound-dai = <0x000000ac>; }; simple-audio-card,codec { phandle = <0x0000017e>; }; }; daudio@5093000 { #sound-dai-cells = <0x00000000>; compatible = "allwinner,sunxi-daudio"; reg = <0x00000000 0x05093000 0x00000000 0x0000007c>; clocks = <0x00000015 0x00000017 0x00000015 0x0000006b 0x00000015 0x0000006f>; clock-names = "pll_audio", "i2s3", "i2s3_bus"; resets = <0x00000015 0x0000002e>; pinctrl-names = "default", "sleep"; pinctrl-0 = <0x000000ad>; pinctrl-1 = <0x000000ae>; pinctrl_used = <0x00000001>; sign_extend = <0x00000000>; tx_data_mode = <0x00000000>; rx_data_mode = <0x00000000>; msb_lsb_first = <0x00000000>; daudio_rxsync_en = <0x00000000>; pcm_lrck_period = <0x00000080>; slot_width_select = <0x00000020>; frametype = <0x00000000>; tdm_config = <0x00000001>; tdm_num = <0x00000003>; mclk_div = <0x00000000>; clk_parent = <0x00000001>; capture_cma = <0x00000080>; playback_cma = <0x00000080>; tx_num = <0x00000004>; tx_chmap1 = <0x76543210>; tx_chmap0 = <0xfedcba98>; rx_num = <0x00000004>; rx_chmap3 = <0x03020100>; rx_chmap2 = <0x07060504>; rx_chmap1 = <0x0b0a0908>; rx_chmap0 = <0x0f0e0d0c>; device_type = "daudio3"; dmas = <0x00000055 0x00000006 0x00000055 0x00000006>; dma-names = "tx", "rx"; status = "disabled"; phandle = <0x000000af>; }; sounddaudio3@509307c { reg = <0x00000000 0x0509307c 0x00000000 0x00000004>; compatible = "sunxi,simple-audio-card"; simple-audio-card,name = "snddaudio3"; simple-audio-card,format = "i2s"; status = "disabled"; phandle = <0x0000017f>; simple-audio-card,cpu { sound-dai = <0x000000af>; }; simple-audio-card,codec { phandle = <0x00000180>; }; }; pinctrl@7022000 { compatible = "allwinner,sun50iw10p1-r-pinctrl"; reg = <0x00000000 0x07022000 0x00000000 0x00000400>; interrupts = <0x00000000 0x0000006f 0x00000004>; clocks = <0x00000024 0x00000002 0x00000028 0x00000029 0x00000002>; clock-names = "apb", "hosc", "losc"; device_type = "r_pio"; gpio-controller; interrupt-controller; #interrupt-cells = <0x00000003>; #size-cells = <0x00000000>; #gpio-cells = <0x00000003>; phandle = <0x00000082>; s_rsb0@0 { pins = "PL0", "PL1"; function = "s_rsb0"; drive-strength = <0x00000014>; bias-pull-up; phandle = <0x00000181>; }; s_uart0@0 { pins = "PL2", "PL3"; function = "s_uart0"; drive-strength = <0x0000000a>; bias-pull-up; phandle = <0x0000003a>; }; s_uart0@1 { pins = "PL2", "PL3"; function = "gpio_in"; phandle = <0x0000003b>; }; s_twi0@0 { pins = "PL0", "PL1"; function = "s_twi0"; drive-strength = <0x0000000a>; bias-pull-up; phandle = <0x0000005c>; }; s_twi0@1 { pins = "PL0", "PL1"; function = "gpio_in"; phandle = <0x0000005d>; }; s_twi1@0 { pins = "PL8", "PL9"; function = "s_twi1"; drive-strength = <0x0000000a>; bias-pull-up; phandle = <0x0000006e>; }; s_twi1@1 { pins = "PL8", "PL9"; function = "gpio_in"; phandle = <0x00000182>; }; s_cir0@0 { pins = "PL11"; function = "s_cir0"; drive-strength = <0x0000000a>; bias-pull-up; phandle = <0x00000183>; }; }; pinctrl@300b000 { compatible = "allwinner,sun50iw10p1-pinctrl"; reg = <0x00000000 0x0300b000 0x00000000 0x00000400>; interrupts = * 0xbbe8c2c8 [0x0000006c]; device_type = "pio"; clocks = <0x00000015 0x0000001d 0x00000029 0x00000002 0x00000028>; clock-names = "apb", "losc", "hosc"; gpio-controller; interrupt-controller; #interrupt-cells = <0x00000003>; #size-cells = <0x00000000>; #gpio-cells = <0x00000003>; vcc-pf-supply = <0x000000b0>; vcc-pfo-supply = <0x000000b1>; input-debounce = <0x00000000 0x00000000 0x00000000 0x00000000 0x00000001 0x00000000 0x00000000 0x00000000 0x00000000>; vcc-pe-supply = <0x000000b0>; phandle = <0x00000045>; test_pins@0 { pins = "PB0", "PB1"; function = "test"; drive-strength = <0x0000000a>; bias-pull-up; phandle = <0x00000099>; }; test_pins@1 { pins = "PB0", "PB1"; function = "gpio_in"; phandle = <0x0000009a>; }; uart0@0 { pins = [00 00]; function = "uart0"; drive-strength = <0x0000000a>; bias-pull-up; phandle = <0x0000002b>; }; uart0@1 { pins = [00 00]; function = "gpio_in"; drive-strength = <0x0000000a>; phandle = <0x0000002c>; }; uart1@0 { pins = "PG6", "PG7", "PG8", "PG9"; function = "uart1"; drive-strength = <0x0000000a>; bias-pull-up; phandle = <0x0000002e>; }; uart1@1 { pins = "PG6", "PG7", "PG8", "PG9"; function = "gpio_in"; phandle = <0x0000002f>; }; uart2@0 { pins = "PB0", "PB1", "PB2", "PB3"; function = "uart2"; drive-strength = <0x0000000a>; bias-pull-up; phandle = <0x00000030>; }; uart2@1 { pins = "PB0", "PB1", "PB2", "PB3"; function = "gpio_in"; phandle = <0x00000031>; }; uart3@0 { pins = "PH4", "PH5", "PH6", "PH7"; function = "uart3"; drive-strength = <0x0000000a>; bias-pull-up; phandle = <0x00000032>; }; uart3@1 { pins = "PH4", "PH5", "PH6", "PH7"; function = "gpio_in"; phandle = <0x00000033>; }; uart4@0 { pins = "PD18", "PD19", "PD20", "PD21"; function = "uart4"; drive-strength = <0x0000000a>; bias-pull-up; phandle = <0x00000034>; }; uart4@1 { pins = "PD18", "PD19", "PD20", "PD21"; function = "gpio_in"; phandle = <0x00000035>; }; uart5@0 { pins = "PI2", "PI3", "PI4", "PI5"; function = "uart5"; drive-strength = <0x0000000a>; bias-pull-up; phandle = <0x00000036>; }; uart5@1 { pins = "PI2", "PI3", "PI4", "PI5"; function = "gpio_in"; phandle = <0x00000037>; }; uart6@0 { pins = "PI6", "PI7", "PI13", "PI14"; function = "uart6"; drive-strength = <0x0000000a>; bias-pull-up; phandle = <0x00000038>; }; uart6@1 { pins = "PI6", "PI7", "PI13", "PI14"; function = "gpio_in"; phandle = <0x00000039>; }; ir0@0 { pins = "PH3"; function = "ir0"; drive-strength = <0x0000000a>; phandle = <0x00000184>; }; ir0@1 { pins = "PH3"; function = "gpio_in"; phandle = <0x00000185>; }; twi0@0 { pins = "PH0", "PH1"; function = "twi0"; drive-strength = <0x0000000a>; phandle = <0x0000004d>; }; twi0@1 { pins = "PH0", "PH1"; function = "gpio_in"; phandle = <0x0000004e>; }; twi1@0 { pins = "PH2", "PH3"; function = "twi1"; drive-strength = <0x0000000a>; phandle = <0x00000050>; }; twi1@1 { pins = "PH2", "PH3"; function = "gpio_in"; phandle = <0x00000051>; }; twi2@0 { pins = "PE1", "PE2"; function = "twi2"; drive-strength = <0x00000014>; phandle = <0x00000052>; }; twi2@1 { pins = "PE1", "PE2"; function = "gpio_in"; phandle = <0x00000053>; }; twi3@0 { pins = "PE3", "PE4"; function = "twi3"; drive-strength = <0x0000000a>; phandle = <0x00000056>; }; twi3@1 { pins = "PE3", "PE4"; function = "gpio_in"; phandle = <0x00000057>; }; twi4@0 { pins = "PI0", "PI1"; function = "twi4"; drive-strength = <0x0000000a>; phandle = <0x00000058>; }; twi4@1 { pins = "PI0", "PI1"; function = "gpio_in"; phandle = <0x00000059>; }; twi5@0 { pins = "PI8", "PI9"; function = "twi5"; drive-strength = <0x0000000a>; phandle = <0x0000005a>; }; twi5@1 { pins = "PI8", "PI9"; function = "gpio_in"; phandle = <0x0000005b>; }; ts0@0 { pins = "PD0", "PD1", "PD2", "PD3", "PD4", "PD5", "PD6", "PD7", "PD8", "PD9", "PD10", "PD11"; function = "ts0"; drive-strength = <0x0000000a>; phandle = <0x00000186>; }; ts0_sleep@0 { pins = "PD0", "PD1", "PD2", "PD3", "PD4", "PD5", "PD6", "PD7", "PD8", "PD9", "PD10", "PD11"; function = "gpio_in"; phandle = <0x00000187>; }; spi0@0 { pins = "PC2", "PC4", "PC12", "PC15", "PC16"; function = "spi0"; drive-strength = <0x0000000a>; phandle = <0x00000085>; }; spi0@1 { pins = "PC3", "PC7"; function = "spi0"; drive-strength = <0x0000000a>; bias-pull-up; phandle = <0x00000086>; }; spi0@2 { pins = "PC2", "PC3", "PC4", "PC7", "PC12", "PC15", "PC16"; function = "gpio_in"; phandle = <0x00000087>; }; spi1@0 { pins = "PD11", "PD12", "PD13"; function = "spi1"; drive-strength = <0x0000000a>; phandle = <0x00000088>; }; spi1@1 { pins = "PD10"; function = "spi1"; drive-strength = <0x0000000a>; bias-pull-up; phandle = <0x00000089>; }; spi1@2 { pins = "PD10", "PD11", "PD12", "PD13"; function = "gpio_in"; phandle = <0x0000008a>; }; spi2@0 { pins = "PB1", "PB2", "PB3"; function = "spi2"; drive-strength = <0x0000000a>; phandle = <0x0000008b>; }; spi2@1 { pins = "PB0"; function = "spi2"; drive-strength = <0x0000000a>; bias-pull-up; phandle = <0x0000008c>; }; spi2@2 { pins = "PB0", "PB1", "PB2", "PB3"; function = "gpio_in"; phandle = <0x0000008d>; }; sdc0@0 { pins = "PF0", "PF1", "PF2", "PF3", "PF4", "PF5"; function = "sdc0"; drive-strength = <0x0000001e>; bias-pull-up; power-source = <0x00000ce4>; allwinner,pins = "PF0", "PF1", "PF2", "PF3", "PF4", "PF5"; allwinner,function = "sdc0"; allwinner,muxsel = <0x00000002>; allwinner,drive = <0x00000003>; allwinner,pull = <0x00000001>; phandle = <0x00000040>; }; sdc0@1 { pins = "PF0", "PF1", "PF2", "PF3", "PF4", "PF5"; function = "sdc0"; drive-strength = <0x0000001e>; bias-pull-up; power-source = <0x00000708>; phandle = <0x00000041>; }; sdc0@2 { pins = "PF0", "PF1", "PF2", "PF3", "PF4", "PF5"; function = "gpio_in"; phandle = <0x00000042>; }; sdc0@3 { pins = "PF2", "PF4"; function = "uart0"; drive-strength = <0x0000000a>; bias-pull-up; phandle = <0x00000043>; }; sdc0@4 { pins = "PF0", "PF1", "PF3", "PF5"; function = "jtag"; drive-strength = <0x0000000a>; bias-pull-up; phandle = <0x00000044>; }; sdc1@0 { pins = "PG0", "PG1", "PG2", "PG3", "PG4", "PG5"; function = "sdc1"; drive-strength = <0x00000028>; bias-pull-up; phandle = <0x00000046>; }; sdc1@1 { pins = "PG0", "PG1", "PG2", "PG3", "PG4", "PG5"; function = "gpio_in"; phandle = <0x00000047>; }; sdc2@0 { pins = "PC1", "PC5", "PC6", "PC8", "PC9", "PC10", "PC11", "PC13", "PC14", "PC15", "PC16"; function = "sdc2"; drive-strength = <0x0000001e>; bias-pull-up; allwinner,pins = "PC1", "PC5", "PC6", "PC8", "PC9", "PC10", "PC11", "PC13", "PC14", "PC15", "PC16"; allwinner,function = "sdc2"; allwinner,muxsel = <0x00000003>; allwinner,drive = <0x00000003>; allwinner,pull = <0x00000001>; phandle = <0x0000003c>; }; sdc2@1 { pins = "PC0", "PC1", "PC5", "PC6", "PC8", "PC9", "PC10", "PC11", "PC13", "PC14", "PC15", "PC16"; function = "gpio_in"; phandle = <0x0000003e>; }; sdc2@2 { pins = "PC0"; function = "sdc2"; drive-strength = <0x0000001e>; bias-pull-down; allwinner,pins = "PC0"; allwinner,function = "sdc2"; allwinner,muxsel = <0x00000003>; allwinner,drive = <0x00000003>; allwinner,pull = <0x00000002>; phandle = <0x0000003d>; }; sdc3@0 { pins = "PI14", "PI13", "PI12", "PI11", "PI10", "PI9"; function = "sdc3"; drive-strength = <0x00000014>; bias-pull-up; phandle = <0x00000048>; }; sdc3@1 { pins = "PI14", "PI13", "PI12", "PI11", "PI10", "PI9"; function = "gpio_in"; phandle = <0x00000049>; }; daudio0@0 { pins = "PB4", "PB5", "PB6", "PB7", "PB8"; function = "h_i2s0"; drive-strength = <0x0000000a>; phandle = <0x000000a4>; }; daudio0_sleep@0 { pins = "PB4", "PB5", "PB6", "PB7", "PB8"; function = "gpio_in"; phandle = <0x000000a5>; }; daudio1@0 { pins = "PG9", "PG10", "PG11", "PG12", "PG13"; function = "h_i2s1"; drive-strength = <0x0000000a>; phandle = <0x000000a7>; }; daudio1_sleep@0 { pins = "PG9", "PG10", "PG11", "PG12", "PG13"; function = "gpio_in"; phandle = <0x000000a8>; }; daudio2@0 { pins = "PE5", "PE6", "PE7", "PE8", "PE9"; function = "h_i2s2"; drive-strength = <0x0000000a>; phandle = <0x000000aa>; }; daudio2_sleep@0 { pins = "PE5", "PE6", "PE7", "PE8", "PE9"; function = "gpio_in"; phandle = <0x000000ab>; }; daudio3@0 { pins = "PH13", "PH14", "PH15", "PH16", "PH17", "PH18", "PH19"; function = "h_i2s3"; drive-strength = <0x0000000a>; phandle = <0x000000ad>; }; daudio3_sleep@0 { pins = "PH13", "PH14", "PH15", "PH16", "PH17", "PH18", "PH19"; function = "gpio_in"; phandle = <0x000000ae>; }; spdif@0 { pins = "PH6", "PH7"; function = "spdif"; drive-strength = <0x0000000a>; phandle = <0x0000009d>; }; spdif_sleep@0 { pins = "PH6", "PH7"; function = "gpio_in"; phandle = <0x0000009e>; }; dmic@0 { pins = "PH8", "PH9", "PH10", "PH11", "PH12"; function = "dmic"; drive-strength = <0x0000000a>; phandle = <0x000000a0>; }; dmic_sleep@0 { pins = "PH8", "PH9", "PH10", "PH11", "PH12"; function = "gpio_in"; phandle = <0x000000a1>; }; csi_mclk0@0 { pins = "PE0"; function = "csi_mclk0"; drive-strength = <0x00000014>; phandle = <0x0000007d>; }; csi_mclk0@1 { pins = "PE0"; function = "gpio_in"; phandle = <0x0000007e>; }; csi_mclk1@0 { pins = "PE5"; function = "csi_mclk1"; drive-strength = <0x00000014>; phandle = <0x0000007f>; }; csi_mclk1@1 { pins = "PE5"; function = "gpio_in"; phandle = <0x00000080>; }; scr0@0 { pins = "PG13", "PG14", "PG10", "PG11", "PG12"; function = "sim0"; bias-pull-up; phandle = <0x00000188>; }; scr0@1 { pins = "PG8", "PG9"; function = "sim0"; bias-pull-up; phandle = <0x00000189>; }; scr0@2 { pins = "PG8", "PG9", "PG10", "PG11", "PG12", "PG13", "PG14"; function = "gpio_in"; phandle = <0x0000018a>; }; scr1@0 { pins = "PH5", "PH6", "PH2", "PH3", "PH4"; function = "sim1"; drive-strength = <0x0000000a>; bias-pull-up; phandle = <0x0000018b>; }; scr1@1 { pins = "PH0", "PH1"; function = "sim1"; drive-strength = <0x0000000a>; bias-pull-up; phandle = <0x0000018c>; }; scr1@2 { pins = "PH0", "PH1", "PH2", "PH3", "PH4", "PH5", "PH6"; function = "gpio_in"; phandle = <0x0000018d>; }; nand0@0 { pins = "PC0", "PC1", "PC2", "PC5", "PC8", "PC9", "PC10", "PC11", "PC12", "PC13", "PC14", "PC15", "PC16"; function = "nand0"; drive-strength = <0x0000001e>; phandle = <0x0000004a>; }; nand0@1 { pins = "PC4", "PC6", "PC3", "PC7"; function = "nand0"; drive-strength = <0x0000001e>; bias-pull-up; phandle = <0x0000004b>; }; nand0@2 { pins = "PC0", "PC1", "PC2", "PC3", "PC4", "PC5", "PC6", "PC7", "PC8", "PC9", "PC10", "PC11", "PC12", "PC13", "PC14", "PC15", "PC16"; function = "gpio_in"; phandle = <0x0000004c>; }; ac200@2 { pins = "PB0"; function = "ac200"; drive-strength = <0x0000000a>; phandle = <0x0000018e>; }; ac200@3 { pins = "PB0"; function = "gpio_in"; phandle = <0x0000018f>; }; gmac@0 { pins = "PH0", "PH1", "PH2", "PH3", "PH4", "PH5", "PH6", "PH7", "PH9", "PH10", "PH13", "PH14", "PH15", "PH16", "PH17", "PH18"; function = "gmac0"; drive-strength = <0x0000001e>; phandle = <0x00000190>; }; gmac@1 { pins = "PH0", "PH1", "PH2", "PH3", "PH4", "PH5", "PH6", "PH7", "PH9", "PH10", "PH13", "PH14", "PH15", "PH16", "PH17", "PH18"; function = "gpio_in"; phandle = <0x00000191>; }; gmac1@0 { pins = "PJ0", "PJ1", "PJ2", "PJ3", "PJ4", "PJ5", "PJ6", "PJ7", "PJ8", "PJ9", "PJ10", "PJ11", "PJ12", "PJ13", "PJ14", "PJ15"; function = "gmac1"; drive-strength = <0x0000001e>; phandle = <0x00000192>; }; gmac1@1 { pins = "PJ0", "PJ1", "PJ2", "PJ3", "PJ4", "PJ5", "PJ6", "PJ7", "PJ8", "PJ9", "PJ10", "PJ11", "PJ12", "PJ13", "PJ14", "PJ15"; function = "gpio_in"; phandle = <0x00000193>; }; ledc@0 { pins = "PE5"; function = "ledc"; drive-strength = <0x0000000a>; bias-pull-up; phandle = <0x0000008e>; }; ledc@1 { pins = "PE5"; function = "gpio_in"; phandle = <0x0000008f>; }; lvds0@0 { pins = "PD0", "PD1", "PD2", "PD3", "PD4", "PD5", "PD8", "PD9", "PD6", "PD7"; function = "lvds0"; drive-strength = <0x0000001e>; phandle = <0x00000194>; }; lvds0@1 { pins = "PD0", "PD1", "PD2", "PD3", "PD4", "PD5", "PD8", "PD9", "PD6", "PD7"; function = "gpio_in"; phandle = <0x00000195>; }; lvds1@0 { pins = "PD10", "PD11", "PD12", "PD13", "PD14", "PD15", "PD18", "PD19", "PD16", "PD17"; function = "lvds1"; drive-strength = <0x0000001e>; phandle = <0x00000196>; }; lvds1@1 { pins = "PD10", "PD11", "PD12", "PD13", "PD14", "PD15", "PD18", "PD19", "PD16", "PD17"; function = "gpio_in"; phandle = <0x00000197>; }; lvds2@0 { pins = "PJ7", "PJ6", "PJ5", "PJ4", "PJ3", "PJ2", "PJ1", "PJ0", "PJ8", "PJ9"; function = "lvds2"; drive-strength = <0x0000001e>; phandle = <0x00000198>; }; lvds2@1 { pins = "PJ7", "PJ6", "PJ5", "PJ4", "PJ3", "PJ2", "PJ1", "PJ0", "PJ8", "PJ9"; function = "gpio_in"; phandle = <0x00000199>; }; lvds3@0 { pins = "PJ10", "PJ11", "PJ12", "PJ13", "PJ14", "PJ15", "PJ16", "PJ17", "PJ18", "PJ19"; function = "lvds3"; drive-strength = <0x0000001e>; phandle = <0x0000019a>; }; lvds3@1 { pins = "PJ10", "PJ11", "PJ12", "PJ13", "PJ14", "PJ15", "PJ16", "PJ17", "PJ18", "PJ19"; function = "gpio_in"; phandle = <0x0000019b>; }; lcd1_lvds2link@0 { pins = "PJ10", "PJ11", "PJ12", "PJ13", "PJ14", "PJ15", "PJ16", "PJ17", "PJ18", "PJ19", "PJ7", "PJ6", "PJ5", "PJ4", "PJ3", "PJ2", "PJ1", "PJ0", "PJ8", "PJ9"; function = "lvds3"; drive-strength = <0x0000001e>; phandle = <0x0000019c>; }; lcd1_lvds2link@1 { pins = "PJ10", "PJ11", "PJ12", "PJ13", "PJ14", "PJ15", "PJ16", "PJ17", "PJ18", "PJ19", "PJ7", "PJ6", "PJ5", "PJ4", "PJ3", "PJ2", "PJ1", "PJ0", "PJ8", "PJ9"; function = "gpio_in"; phandle = <0x0000019d>; }; lvds2link@0 { pins = "PD0", "PD1", "PD2", "PD3", "PD4", "PD5", "PD8", "PD9", "PD6", "PD7", "PD10", "PD11", "PD12", "PD13", "PD14", "PD15", "PD18", "PD19", "PD16", "PD17"; function = "lvds2link"; drive-strength = <0x0000001e>; phandle = <0x0000019e>; }; lvds2link@1 { pins = "PD0", "PD1", "PD2", "PD3", "PD4", "PD5", "PD8", "PD9", "PD6", "PD7", "PD10", "PD11", "PD12", "PD13", "PD14", "PD15", "PD18", "PD19", "PD16", "PD17"; function = "gpio_in"; phandle = <0x0000019f>; }; rgb24@0 { pins = "PJ0", "PJ1", "PJ2", "PJ3", "PJ4", "PJ5", "PJ6", "PJ7", "PJ8", "PJ9", "PJ10", "PJ11", "PJ12", "PJ13", "PJ14", "PJ15", "PJ16", "PJ17", "PJ18", "PJ19", "PJ20", "PJ21", "PJ22", "PJ23", "PJ24", "PJ25", "PJ26", "PJ27"; function = "lcd1"; drive-strength = <0x0000001e>; phandle = <0x000001a0>; }; rgb24@1 { pins = "PJ0", "PJ1", "PJ2", "PJ3", "PJ4", "PJ5", "PJ6", "PJ7", "PJ8", "PJ9", "PJ10", "PJ11", "PJ12", "PJ13", "PJ14", "PJ15", "PJ16", "PJ17", "PJ18", "PJ19", "PJ20", "PJ21", "PJ22", "PJ23", "PJ24", "PJ25", "PJ26", "PJ27"; function = "gpio_in"; phandle = <0x000001a1>; }; rgb18@0 { pins = "PD0", "PD1", "PD2", "PD3", "PD4", "PD5", "PD6", "PD7", "PD8", "PD9", "PD10", "PD11", "PD12", "PD13", "PD14", "PD15", "PD16", "PD17", "PD18", "PD19", "PD20", "PD21"; function = "lcd0"; drive-strength = <0x0000001e>; phandle = <0x000001a2>; }; rgb18@1 { pins = "PD0", "PD1", "PD2", "PD3", "PD4", "PD5", "PD6", "PD7", "PD8", "PD9", "PD10", "PD11", "PD12", "PD13", "PD14", "PD15", "PD16", "PD17", "PD18", "PD19", "PD20", "PD21"; function = "gpio_in"; phandle = <0x000001a3>; }; eink@0 { pins = "PD0", "PD1", "PD2", "PD3", "PD4", "PD5", "PD6", "PD7", "PD8", "PD9", "PD10", "PD11", "PD12", "PD13", "PD14", "PD15", "PD16", "PD17", "PD18", "PD19", "PD20", "PD21", "PD22"; function = "eink"; drive-strength = <0x0000001e>; phandle = <0x000001a4>; }; eink@1 { pins = "PD0", "PD1", "PD2", "PD3", "PD4", "PD5", "PD6", "PD7", "PD8", "PD9", "PD10", "PD11", "PD12", "PD13", "PD14", "PD15", "PD16", "PD17", "PD18", "PD19", "PD20", "PD21", "PD22"; function = "gpio_in"; phandle = <0x000001a5>; }; dsi4lane@0 { pins = "PD0", "PD1", "PD2", "PD3", "PD4", "PD5", "PD6", "PD7", "PD8", "PD9"; function = "dsi0"; drive-strength = <0x0000001e>; phandle = <0x00000097>; }; dsi4lane@1 { pins = "PD0", "PD1", "PD2", "PD3", "PD4", "PD5", "PD6", "PD7", "PD8", "PD9"; function = "gpio_in"; phandle = <0x00000098>; }; pwm0_pin_a { allwinner,pins = "PD23"; allwinner,function = "pwm0"; allwinner,muxsel = <0x00000002>; allwinner,drive = <0x00000001>; allwinner,pull = <0x00000000>; phandle = <0x00000079>; }; pwm0_pin_b { allwinner,pins = "PD23"; allwinner,function = "gpio_in"; allwinner,muxsel = <0x00000000>; allwinner,drive = <0x00000002>; allwinner,pull = <0x00000000>; phandle = <0x0000007a>; }; pwm1_pin_a { allwinner,pins = "PD22"; allwinner,function = "pwm1"; allwinner,muxsel = <0x00000002>; allwinner,drive = <0x00000002>; allwinner,pull = <0x00000000>; phandle = <0x0000007b>; }; pwm1_pin_b { allwinner,pins = "PD22"; allwinner,function = "gpio_in"; allwinner,muxsel = <0x00000000>; allwinner,drive = <0x00000002>; allwinner,pull = <0x00000000>; phandle = <0x0000007c>; }; }; gpu@1800000 { device_type = "gpu"; compatible = "img,gpu"; reg = <0x00000000 0x01800000 0x00000000 0x00080000>; interrupts = <0x00000000 0x00000061 0x00000004>; interrupt-names = "IRQGPU"; clocks = <0x00000015 0x00000007 0x00000015 0x00000029 0x00000015 0x0000002a>; clock-names = "clk_parent", "clk_mali", "clk_bus"; resets = <0x00000015 0x00000005>; power-domains = <0x000000b2>; gpu_idle = <0x00000000>; dvfs_status = <0x00000001>; pll_rate = <0x0006f540>; independent_power = <0x00000000>; markid-points = <0x00000400 0x000001c8 0x00001400 0x000001f8 0x00001000 0x000001f8 0x00002000 0x000001f8 0x00000000 0x000001f8>; operating-points = <0x0006f540 0x000e7ef0 0x00061698 0x000e7ef0 0x00037aa0 0x000e7ef0>; phandle = <0x000001a6>; }; rfkill { compatible = "allwinner,sunxi-rfkill"; status = "okay"; chip_en; power_en; pinctrl-0; pinctrl-names; phandle = <0x000001a7>; wlan { compatible = "allwinner,sunxi-wlan"; clocks = <0x00000029 0x00000000 0x00000029 0x00000003>; clock-names = "dcxo24M-out", "osc32k-out"; wlan_power = "axp2202-bldo1"; wlan_power_vol = <0x00325aa0>; wlan_busnum = <0x00000001>; wlan_regon = <0x00000082 0x00000000 0x00000005 0x00000000>; wlan_hostwake = <0x00000082 0x00000000 0x00000006 0x00000000>; wakeup-source; }; bt { compatible = "allwinner,sunxi-bt"; clocks = <0x00000029 0x00000000 0x00000029 0x00000003>; clock-names = "dcxo24M-out", "osc32k-out"; bt_power = "axp2202-bldo1"; bt_power_vol = <0x00325aa0>; bt_rst_n = <0x00000082 0x00000000 0x00000002 0x00000001>; }; }; addr_mgt { compatible = "allwinner,sunxi-addr_mgt"; status = "okay"; type_addr_wifi = <0x00000000>; type_addr_bt = <0x00000000>; type_addr_eth = <0x00000000>; phandle = <0x000001a8>; }; btlpm { compatible = "allwinner,sunxi-btlpm"; status = "okay"; uart_index = <0x00000001>; bt_wake = <0x00000082 0x00000000 0x00000004 0x00000000>; bt_hostwake = <0x00000082 0x00000000 0x00000003 0x00000000>; wakeup-source; phandle = <0x000001a9>; }; platform@45000004 { reg = <0x00000000 0x45000004 0x00000000 0x00000000>; eraseflag = <0x00000001>; next_work = <0x00000003>; debug_mode = <0x00000008>; }; target@45000008 { reg = <0x00000000 0x45000008 0x00000000 0x00000000>; boot_clock = <0x000003f0>; storage_type = <0xffffffff>; burn_key = <0x00000001>; dragonboard_test = <0x00000000>; }; power_sply@4500000c { reg = <0x00000000 0x4500000c 0x00000000 0x00000000>; dcdc1_vol = <0x000f45ec>; aldo1_vol = <0x000f4948>; aldo2_vol = <0x000f4948>; aldo4_vol = <0x000f4948>; aldo3_vol = <0x000f4f24>; bldo1_vol = <0x00000ce4>; bldo2_vol = <0x000f4948>; bldo4_vol = <0x000f4948>; cldo1_vol = <0x000f4948>; cldo3_vol = <0x000f4f24>; cldo4_vol = <0x000f4f24>; cpusldo_vol = <0x000f6568>; }; charger0@45000010 { reg = <0x00000000 0x45000010 0x00000000 0x00000000>; pmu_safe_vol = <0x00000d48>; }; card0_boot_para@2 { reg = <0x00000000 0x00000002 0x00000000 0x00000000>; device_type = "card0_boot_para"; card_ctrl = <0x00000000>; card_high_speed = <0x00000001>; card_line = <0x00000004>; pinctrl-0 = <0x00000040>; }; card2_boot_para@3 { reg = <0x00000000 0x00000003 0x00000000 0x00000000>; device_type = "card2_boot_para"; card_ctrl = <0x00000002>; card_high_speed = <0x00000001>; card_line = <0x00000008>; pinctrl-0 = <0x0000003c 0x0000003d>; sdc_ex_dly_used = <0x00000002>; sdc_io_1v8 = <0x00000001>; sdc_tm4_win_th = <0x00000008>; sdc_tm4_hs200_max_freq = <0x00000096>; sdc_tm4_hs400_max_freq = <0x00000064>; sdc_type = "tm4"; }; gpio_bias@4 { reg = <0x00000000 0x00000004 0x00000000 0x00000000>; device_type = "gpio_bias"; pc_bias = <0x00000708>; }; auto_print@54321 { reg = <0x00000000 0x00054321 0x00000000 0x00000000>; device_type = "auto_print"; status = "okay"; }; standby_param@7000400 { reg = <0x00000000 0x07000400 0x00000000 0x00000000>; vdd-cpu = <0x00000001>; vdd-sys = <0x00000002>; vcc-pll = <0x00000080>; osc24m-on = <0x00000000>; phandle = <0x000001aa>; }; hall_para { hall_name = "MH248"; status = "okay"; hall_int_port = <0x00000082 0x00000000 0x00000009 0x00000006 0x00000001 0xffffffff 0xffffffff>; }; }; usb1-vbus { compatible = "regulator-fixed"; regulator-name = "usb1-vbus"; regulator-min-microvolt = <0x004c4b40>; regulator-max-microvolt = <0x004c4b40>; regulator-enable-ramp-delay = <0x000003e8>; gpio = <0x00000082 0x00000000 0x00000008 0x00000000>; enable-active-high; phandle = <0x00000091>; }; axp2202-parameter { select = "battery-model"; phandle = <0x0000005f>; battery-model { parameter = * 0xbbe8ff7c [0x00000080]; }; }; __symbols__ { clk_losc = "/clocks/losc"; clk_iosc = "/clocks/iosc"; clk_hosc = "/clocks/hosc"; clk_osc48m = "/clocks/osc48m"; clk_hoscdiv32k = "/clocks/hoscdiv32k"; clk_pll_periph0div25m = "/clocks/pll_periph0div25m"; clk_pll_cpu = "/clocks/pll_cpu"; clk_pll_ddr = "/clocks/pll_ddr"; clk_pll_periph0 = "/clocks/pll_periph0"; clk_pll_periph1 = "/clocks/pll_periph1"; clk_pll_gpu = "/clocks/pll_gpu"; clk_pll_video0x4 = "/clocks/pll_video0x4"; clk_pll_video1x4 = "/clocks/pll_video1x4"; clk_pll_video2 = "/clocks/pll_video2"; clk_pll_video3 = "/clocks/pll_video3"; clk_pll_ve = "/clocks/pll_ve"; clk_pll_com = "/clocks/pll_com"; clk_pll_audiox4 = "/clocks/pll_audiox4"; clk_pll_periph0x2 = "/clocks/pll_periph0x2"; clk_pll_periph0x4 = "/clocks/pll_periph0x4"; clk_periph32k = "/clocks/periph32k"; clk_pll_periph1x2 = "/clocks/pll_periph1x2"; clk_pll_comdiv5 = "/clocks/pll_comdiv5"; clk_pll_audiox8 = "/clocks/pll_audiox8"; clk_pll_audio = "/clocks/pll_audio"; clk_pll_audiox2 = "/clocks/pll_audiox2"; clk_pll_video0 = "/clocks/pll_video0"; clk_pll_video0x2 = "/clocks/pll_video0x2"; clk_pll_video1 = "/clocks/pll_video1"; clk_pll_video1x2 = "/clocks/pll_video1x2"; clk_pll_video2x2 = "/clocks/pll_video2x2"; clk_pll_video2x4 = "/clocks/pll_video2x4"; clk_pll_video3x2 = "/clocks/pll_video3x2"; clk_pll_video3x4 = "/clocks/pll_video3x4"; clk_hoscd2 = "/clocks/hoscd2"; clk_osc48md4 = "/clocks/osc48md4"; clk_pll_periph0d6 = "/clocks/pll_periph0d6"; clk_cpu = "/clocks/cpu"; clk_axi = "/clocks/axi"; clk_cpuapb = "/clocks/cpuapb"; clk_psi = "/clocks/psi"; clk_ahb1 = "/clocks/ahb1"; clk_ahb2 = "/clocks/ahb2"; clk_ahb3 = "/clocks/ahb3"; clk_apb1 = "/clocks/apb1"; clk_apb2 = "/clocks/apb2"; clk_de0 = "/clocks/de0"; clk_de1 = "/clocks/de1"; clk_g2d = "/clocks/g2d"; clk_ee = "/clocks/ee"; clk_panel = "/clocks/panel"; clk_gpu = "/clocks/gpu"; clk_ce = "/clocks/ce"; clk_ve = "/clocks/ve"; clk_dma = "/clocks/dma"; clk_msgbox = "/clocks/msgbox"; clk_hwspinlock_rst = "/clocks/hwspinlock_rst"; clk_hwspinlock_bus = "/clocks/hwspinlock_bus"; clk_hstimer = "/clocks/hstimer"; clk_avs = "/clocks/avs"; clk_dbgsys = "/clocks/dbgsys"; clk_pwm = "/clocks/pwm"; clk_iommu = "/clocks/iommu"; clk_nand0 = "/clocks/nand0"; clk_nand1 = "/clocks/nand1"; clk_sdmmc0_mod = "/clocks/sdmmc0_mod"; clk_sdmmc0_bus = "/clocks/sdmmc0_bus"; clk_sdmmc0_rst = "/clocks/sdmmc0_rst"; clk_sdmmc1_mod = "/clocks/sdmmc1_mod"; clk_sdmmc1_bus = "/clocks/sdmmc1_bus"; clk_sdmmc1_rst = "/clocks/sdmmc1_rst"; clk_sdmmc2_mod = "/clocks/sdmmc2_mod"; clk_sdmmc2_bus = "/clocks/sdmmc2_bus"; clk_sdmmc2_rst = "/clocks/sdmmc2_rst"; clk_uart0 = "/clocks/uart0"; clk_uart1 = "/clocks/uart1"; clk_uart2 = "/clocks/uart2"; clk_uart3 = "/clocks/uart3"; clk_uart4 = "/clocks/uart4"; clk_uart5 = "/clocks/uart5"; clk_uart6 = "/clocks/uart6"; clk_scr0 = "/clocks/scr0"; clk_gmac0_25m = "/clocks/gmac0_25m"; clk_gmac1_25m = "/clocks/gmac1_25m"; clk_gmac0 = "/clocks/gmac0"; clk_gmac1 = "/clocks/gmac1"; clk_gpadc = "/clocks/gpadc"; clk_irtx = "/clocks/irtx"; clk_ths = "/clocks/ths"; clk_i2s0 = "/clocks/i2s0"; clk_i2s1 = "/clocks/i2s1"; clk_i2s2 = "/clocks/i2s2"; clk_i2s3 = "/clocks/i2s3"; clk_spdif = "/clocks/spdif"; clk_dmic = "/clocks/dmic"; clk_codec_dac_1x = "/clocks/codec_dac_1x"; clk_codec_adc_1x = "/clocks/codec_adc_1x"; clk_codec_4x = "/clocks/codec_4x"; clk_usbphy0 = "/clocks/usbphy0"; clk_usbphy1 = "/clocks/usbphy1"; clk_usbohci0 = "/clocks/usbohci0"; clk_usbohci0_12m = "/clocks/usbohci0_12m"; clk_usbohci1 = "/clocks/usbohci1"; clk_usbohci1_12m = "/clocks/usbohci1_12m"; clk_usbehci0 = "/clocks/usbehci0"; clk_usbehci1 = "/clocks/usbehci1"; clk_usbotg = "/clocks/usbotg"; clk_display_top = "/clocks/display_top"; clk_dpss_top0 = "/clocks/dpss_top0"; clk_dpss_top1 = "/clocks/dpss_top1"; clk_tcon_lcd0 = "/clocks/tcon_lcd0"; clk_tcon_lcd1 = "/clocks/tcon_lcd1"; clk_lvds = "/clocks/lvds"; clk_lvds1 = "/clocks/lvds1"; clk_mipi_host = "/clocks/mipi_host"; clk_csi_top = "/clocks/csi_top"; clk_csi_isp = "/clocks/csi_isp"; clk_csi_master0 = "/clocks/csi_master0"; clk_csi_master1 = "/clocks/csi_master1"; clk_pio = "/clocks/pio"; clk_ledc = "/clocks/ledc"; clk_cpurcir = "/clocks/cpurcir"; clk_losc_out = "/clocks/losc_out"; clk_cpurcpus_pll = "/clocks/cpurcpus_pll"; clk_cpurcpus = "/clocks/cpurcpus"; clk_cpurahbs = "/clocks/cpurahbs"; clk_cpurapbs1 = "/clocks/cpurapbs1"; clk_cpurapbs2_pll = "/clocks/cpurapbs2_pll"; clk_cpurapbs2 = "/clocks/cpurapbs2"; clk_ppu = "/clocks/ppu"; clk_cpurpio = "/clocks/cpurpio"; clk_dcxo_out = "/clocks/dcxo_out"; clk_suart = "/clocks/suart"; clk_lradc = "/clocks/lradc"; cpu0 = "/cpus/cpu@0"; cpu1 = "/cpus/cpu@1"; cpu2 = "/cpus/cpu@2"; cpu3 = "/cpus/cpu@3"; CPU_SLEEP_0 = "/cpus/idle-states/cpu-sleep-0"; CLUSTER_SLEEP_0 = "/cpus/idle-states/cluster-sleep-0"; cpu_opp_table = "/cpu-opp-table"; dcxo24M = "/dcxo24M-clk"; cpu_trips = "/thermal-zones/cpu_thermal_zone/trips"; cpu_threshold = "/thermal-zones/cpu_thermal_zone/trips/trip-point@0"; cpu_target = "/thermal-zones/cpu_thermal_zone/trips/trip-point@1"; cpu_crit = "/thermal-zones/cpu_thermal_zone/trips/cpu_crit@0"; gic = "/interrupt-controller@3020000"; wakeupgen = "/interrupt-controller@0"; pd_gpu = "/gpu-power-domain@7001000"; nmi_intc = "/intc-nmi@7010320"; dram = "/dram"; ddr_clk = "/clk_ddr"; dfi = "/nsi-pmu@3100000"; dram_opp_table = "/opp_table"; uboot = "/uboot"; mmu_aw = "/iommu@30f0000"; dump_reg = "/dump_reg@20000"; reg_pio1_8 = "/pio-18"; reg_pio2_8 = "/pio-28"; reg_pio3_3 = "/pio-33"; soc = "/soc@2900000"; sram_ctrl = "/soc@2900000/sram_ctrl@3000000"; ccu = "/soc@2900000/clock@3001000"; r_ccu = "/soc@2900000/clock@7010000"; dma = "/soc@2900000/dma-controller@3002000"; rtc = "/soc@2900000/rtc@7000000"; rtc_ccu = "/soc@2900000/rtc_ccu@7000000"; nsi0 = "/soc@2900000/nsi-controller@3100000"; speedbin_efuse = "/soc@2900000/sid@3006000/speed@00"; ths_calib = "/soc@2900000/sid@3006000/calib@14"; cpubin_efuse = "/soc@2900000/sid@3006000/calib@1c"; cpubin_extend = "/soc@2900000/sid@3006000/calib@28"; cryptoengine = "/soc@2900000/ce@1904000"; ths = "/soc@2900000/ths@5070400"; soc_timer0 = "/soc@2900000/timer@3009000"; uart0 = "/soc@2900000/uart@5000000"; uart1 = "/soc@2900000/uart@5000400"; uart2 = "/soc@2900000/uart@5000800"; uart3 = "/soc@2900000/uart@5000c00"; uart4 = "/soc@2900000/uart@5001000"; uart5 = "/soc@2900000/uart@5001400"; uart6 = "/soc@2900000/uart@5001800"; uart7 = "/soc@2900000/uart@7080000"; sdc2 = "/soc@2900000/sdmmc@4022000"; sdc0 = "/soc@2900000/sdmmc@4020000"; sdc1 = "/soc@2900000/sdmmc@4021000"; sdc3 = "/soc@2900000/sdmmc@4023000"; nand0 = "/soc@2900000/nand0@04011000"; twi0 = "/soc@2900000/twi@5002000"; ctp = "/soc@2900000/twi@5002000/ctp@0"; twi1 = "/soc@2900000/twi@5002400"; twi2 = "/soc@2900000/twi@5002800"; twi3 = "/soc@2900000/twi@5002c00"; twi4 = "/soc@2900000/twi@5003000"; twi5 = "/soc@2900000/twi@5003400"; twi6 = "/soc@2900000/s_twi@7081400"; pmu0 = "/soc@2900000/s_twi@7081400/pmu@34"; usb_power_supply = "/soc@2900000/s_twi@7081400/pmu@34/usb_power_supply"; gpio_power_supply = "/soc@2900000/s_twi@7081400/pmu@34/gpio_power_supply"; bat_power_supply = "/soc@2900000/s_twi@7081400/pmu@34/bat-power-supply"; powerkey0 = "/soc@2900000/s_twi@7081400/pmu@34/powerkey@0"; regulator0 = "/soc@2900000/s_twi@7081400/pmu@34/regulators@0"; reg_dcdc1 = "/soc@2900000/s_twi@7081400/pmu@34/regulators@0/dcdc1"; reg_dcdc2 = "/soc@2900000/s_twi@7081400/pmu@34/regulators@0/dcdc2"; reg_dcdc3 = "/soc@2900000/s_twi@7081400/pmu@34/regulators@0/dcdc3"; reg_dcdc4 = "/soc@2900000/s_twi@7081400/pmu@34/regulators@0/dcdc4"; reg_rtcldo = "/soc@2900000/s_twi@7081400/pmu@34/regulators@0/rtcldo"; reg_aldo1 = "/soc@2900000/s_twi@7081400/pmu@34/regulators@0/aldo1"; reg_aldo2 = "/soc@2900000/s_twi@7081400/pmu@34/regulators@0/aldo2"; reg_aldo3 = "/soc@2900000/s_twi@7081400/pmu@34/regulators@0/aldo3"; reg_aldo4 = "/soc@2900000/s_twi@7081400/pmu@34/regulators@0/aldo4"; reg_bldo1 = "/soc@2900000/s_twi@7081400/pmu@34/regulators@0/bldo1"; reg_bldo2 = "/soc@2900000/s_twi@7081400/pmu@34/regulators@0/bldo2"; reg_bldo3 = "/soc@2900000/s_twi@7081400/pmu@34/regulators@0/bldo3"; reg_bldo4 = "/soc@2900000/s_twi@7081400/pmu@34/regulators@0/bldo4"; reg_cldo1 = "/soc@2900000/s_twi@7081400/pmu@34/regulators@0/cldo1"; reg_cldo2 = "/soc@2900000/s_twi@7081400/pmu@34/regulators@0/cldo2"; reg_cldo3 = "/soc@2900000/s_twi@7081400/pmu@34/regulators@0/cldo3"; reg_cldo4 = "/soc@2900000/s_twi@7081400/pmu@34/regulators@0/cldo4"; reg_cpusldo = "/soc@2900000/s_twi@7081400/pmu@34/regulators@0/cpusldo"; reg_drivevbus = "/soc@2900000/s_twi@7081400/pmu@34/regulators@0/drivevbus"; axp_gpio0 = "/soc@2900000/s_twi@7081400/pmu@34/axp_gpio@0"; twi7 = "/soc@2900000/s_twi@7081800"; pwm = "/soc@2900000/pwm@300a000"; pwm0 = "/soc@2900000/pwm0@300a010"; pwm1 = "/soc@2900000/pwm1@300a011"; pwm2 = "/soc@2900000/pwm2@300a012"; pwm3 = "/soc@2900000/pwm3@300a013"; pwm4 = "/soc@2900000/pwm4@300a014"; pwm5 = "/soc@2900000/pwm5@300a015"; pwm6 = "/soc@2900000/pwm6@300a016"; pwm7 = "/soc@2900000/pwm7@300a017"; pwm8 = "/soc@2900000/pwm8@300a018"; pwm9 = "/soc@2900000/pwm9@300a019"; vind0 = "/soc@2900000/vind@2000800"; csi0 = "/soc@2900000/vind@2000800/csi@2001000"; csi1 = "/soc@2900000/vind@2000800/csi@2002000"; mipi0 = "/soc@2900000/vind@2000800/mipi@200a100"; mipi1 = "/soc@2900000/vind@2000800/mipi@200a200"; tdm0 = "/soc@2900000/vind@2000800/tdm@2108000"; isp0 = "/soc@2900000/vind@2000800/isp@2100000"; isp1 = "/soc@2900000/vind@2000800/isp@2102000"; scaler0 = "/soc@2900000/vind@2000800/scaler@2110000"; scaler1 = "/soc@2900000/vind@2000800/scaler@2110400"; scaler2 = "/soc@2900000/vind@2000800/scaler@2110800"; scaler3 = "/soc@2900000/vind@2000800/scaler@2110c00"; actuator0 = "/soc@2900000/vind@2000800/actuator@2108180"; flash0 = "/soc@2900000/vind@2000800/flash@2108190"; sensor0 = "/soc@2900000/vind@2000800/sensor@200b800"; sensor1 = "/soc@2900000/vind@2000800/sensor@200b810"; vinc0 = "/soc@2900000/vind@2000800/vinc@2009000"; vinc1 = "/soc@2900000/vind@2000800/vinc@2009200"; vinc2 = "/soc@2900000/vind@2000800/vinc@2009400"; vinc3 = "/soc@2900000/vind@2000800/vinc@2009600"; keyboard = "/soc@2900000/keyboard@5070800"; spi0 = "/soc@2900000/spi@5010000"; spi1 = "/soc@2900000/spi@5011000"; spi2 = "/soc@2900000/spi@5012000"; ledc = "/soc@2900000/ledc@0x5018000"; usbc0 = "/soc@2900000/usbc0@10"; udc = "/soc@2900000/udc-controller@5100000"; ehci0 = "/soc@2900000/ehci0-controller@5101000"; ohci0 = "/soc@2900000/ohci0-controller@5101400"; usbc1 = "/soc@2900000/usbc1@11"; ehci1 = "/soc@2900000/ehci1-controller@5200000"; ohci1 = "/soc@2900000/ohci1-controller@5200400"; disp1 = "/soc@2900000/disp1@1"; disp = "/soc@2900000/disp@6000000"; uboot_disp = "/soc@2900000/uboot_disp@06100000"; lcd0_1 = "/soc@2900000/lcd0_1@1c0c000"; lcd0_2 = "/soc@2900000/lcd0_2@1c0c000"; lcd0_3 = "/soc@2900000/lcd0_3@1c0c000"; lcd0 = "/soc@2900000/lcd0@1c0c000"; lcd1 = "/soc@2900000/lcd1@1"; eink = "/soc@2900000/eink@6400000"; uboot_eink = "/soc@2900000/uboot_eink@6400000"; ve = "/soc@2900000/ve@1c0e000"; g2d = "/soc@2900000/g2d@6480000"; pinctrl_test = "/soc@2900000/pinctrl_test@0"; codec = "/soc@2900000/codec@5096000"; dummy_cpudai = "/soc@2900000/dummy_cpudai@509632c"; sndcodec = "/soc@2900000/sound@5096330"; spdif = "/soc@2900000/spdif@5094000"; soundspdif = "/soc@2900000/soundspdif@5094040"; dmic = "/soc@2900000/dmic@5095000"; dmic_codec = "/soc@2900000/sound@5095050"; sounddmic = "/soc@2900000/sounddmic@5095060"; daudio0 = "/soc@2900000/daudio@5090000"; sounddaudio0 = "/soc@2900000/sounddaudio0@509007c"; daudio0_master = "/soc@2900000/sounddaudio0@509007c/simple-audio-card,codec"; daudio1 = "/soc@2900000/daudio@5091000"; sounddaudio1 = "/soc@2900000/sounddaudio1@509107c"; daudio1_master = "/soc@2900000/sounddaudio1@509107c/simple-audio-card,codec"; daudio2 = "/soc@2900000/daudio@5092000"; sounddaudio2 = "/soc@2900000/sounddaudio2@509207c"; daudio2_master = "/soc@2900000/sounddaudio2@509207c/simple-audio-card,codec"; daudio3 = "/soc@2900000/daudio@5093000"; sounddaudio3 = "/soc@2900000/sounddaudio3@509307c"; daudio3_master = "/soc@2900000/sounddaudio3@509307c/simple-audio-card,codec"; r_pio = "/soc@2900000/pinctrl@7022000"; s_rsb0_pins_a = "/soc@2900000/pinctrl@7022000/s_rsb0@0"; s_uart0_pins_a = "/soc@2900000/pinctrl@7022000/s_uart0@0"; s_uart0_pins_b = "/soc@2900000/pinctrl@7022000/s_uart0@1"; s_twi0_pins_a = "/soc@2900000/pinctrl@7022000/s_twi0@0"; s_twi0_pins_b = "/soc@2900000/pinctrl@7022000/s_twi0@1"; s_twi1_pins_a = "/soc@2900000/pinctrl@7022000/s_twi1@0"; s_twi1_pins_b = "/soc@2900000/pinctrl@7022000/s_twi1@1"; s_cir0_pins_a = "/soc@2900000/pinctrl@7022000/s_cir0@0"; pio = "/soc@2900000/pinctrl@300b000"; test_pins_a = "/soc@2900000/pinctrl@300b000/test_pins@0"; test_pins_b = "/soc@2900000/pinctrl@300b000/test_pins@1"; uart0_pins_a = "/soc@2900000/pinctrl@300b000/uart0@0"; uart0_pins_b = "/soc@2900000/pinctrl@300b000/uart0@1"; uart1_pins_a = "/soc@2900000/pinctrl@300b000/uart1@0"; uart1_pins_b = "/soc@2900000/pinctrl@300b000/uart1@1"; uart2_pins_a = "/soc@2900000/pinctrl@300b000/uart2@0"; uart2_pins_b = "/soc@2900000/pinctrl@300b000/uart2@1"; uart3_pins_a = "/soc@2900000/pinctrl@300b000/uart3@0"; uart3_pins_b = "/soc@2900000/pinctrl@300b000/uart3@1"; uart4_pins_a = "/soc@2900000/pinctrl@300b000/uart4@0"; uart4_pins_b = "/soc@2900000/pinctrl@300b000/uart4@1"; uart5_pins_a = "/soc@2900000/pinctrl@300b000/uart5@0"; uart5_pins_b = "/soc@2900000/pinctrl@300b000/uart5@1"; uart6_pins_a = "/soc@2900000/pinctrl@300b000/uart6@0"; uart6_pins_b = "/soc@2900000/pinctrl@300b000/uart6@1"; ir0_pins_a = "/soc@2900000/pinctrl@300b000/ir0@0"; ir0_pins_b = "/soc@2900000/pinctrl@300b000/ir0@1"; twi0_pins_a = "/soc@2900000/pinctrl@300b000/twi0@0"; twi0_pins_b = "/soc@2900000/pinctrl@300b000/twi0@1"; twi1_pins_a = "/soc@2900000/pinctrl@300b000/twi1@0"; twi1_pins_b = "/soc@2900000/pinctrl@300b000/twi1@1"; twi2_pins_a = "/soc@2900000/pinctrl@300b000/twi2@0"; twi2_pins_b = "/soc@2900000/pinctrl@300b000/twi2@1"; twi3_pins_a = "/soc@2900000/pinctrl@300b000/twi3@0"; twi3_pins_b = "/soc@2900000/pinctrl@300b000/twi3@1"; twi4_pins_a = "/soc@2900000/pinctrl@300b000/twi4@0"; twi4_pins_b = "/soc@2900000/pinctrl@300b000/twi4@1"; twi5_pins_a = "/soc@2900000/pinctrl@300b000/twi5@0"; twi5_pins_b = "/soc@2900000/pinctrl@300b000/twi5@1"; ts0_pins_a = "/soc@2900000/pinctrl@300b000/ts0@0"; ts0_pins_b = "/soc@2900000/pinctrl@300b000/ts0_sleep@0"; spi0_pins_a = "/soc@2900000/pinctrl@300b000/spi0@0"; spi0_pins_b = "/soc@2900000/pinctrl@300b000/spi0@1"; spi0_pins_c = "/soc@2900000/pinctrl@300b000/spi0@2"; spi1_pins_a = "/soc@2900000/pinctrl@300b000/spi1@0"; spi1_pins_b = "/soc@2900000/pinctrl@300b000/spi1@1"; spi1_pins_c = "/soc@2900000/pinctrl@300b000/spi1@2"; spi2_pins_a = "/soc@2900000/pinctrl@300b000/spi2@0"; spi2_pins_b = "/soc@2900000/pinctrl@300b000/spi2@1"; spi2_pins_c = "/soc@2900000/pinctrl@300b000/spi2@2"; card0_pins_a = "/soc@2900000/pinctrl@300b000/sdc0@0"; sdc0_pins_a = "/soc@2900000/pinctrl@300b000/sdc0@0"; sdc0_pins_b = "/soc@2900000/pinctrl@300b000/sdc0@1"; sdc0_pins_c = "/soc@2900000/pinctrl@300b000/sdc0@2"; sdc0_pins_d = "/soc@2900000/pinctrl@300b000/sdc0@3"; sdc0_pins_e = "/soc@2900000/pinctrl@300b000/sdc0@4"; sdc1_pins_a = "/soc@2900000/pinctrl@300b000/sdc1@0"; sdc1_pins_b = "/soc@2900000/pinctrl@300b000/sdc1@1"; card2_pins_a = "/soc@2900000/pinctrl@300b000/sdc2@0"; sdc2_pins_a = "/soc@2900000/pinctrl@300b000/sdc2@0"; sdc2_pins_b = "/soc@2900000/pinctrl@300b000/sdc2@1"; card2_pins_c = "/soc@2900000/pinctrl@300b000/sdc2@2"; sdc2_pins_c = "/soc@2900000/pinctrl@300b000/sdc2@2"; sdc3_pins_a = "/soc@2900000/pinctrl@300b000/sdc3@0"; sdc3_pins_b = "/soc@2900000/pinctrl@300b000/sdc3@1"; daudio0_pins_a = "/soc@2900000/pinctrl@300b000/daudio0@0"; daudio0_pins_b = "/soc@2900000/pinctrl@300b000/daudio0_sleep@0"; daudio1_pins_a = "/soc@2900000/pinctrl@300b000/daudio1@0"; daudio1_pins_b = "/soc@2900000/pinctrl@300b000/daudio1_sleep@0"; daudio2_pins_a = "/soc@2900000/pinctrl@300b000/daudio2@0"; daudio2_pins_b = "/soc@2900000/pinctrl@300b000/daudio2_sleep@0"; daudio3_pins_a = "/soc@2900000/pinctrl@300b000/daudio3@0"; daudio3_pins_b = "/soc@2900000/pinctrl@300b000/daudio3_sleep@0"; spdif_pins_a = "/soc@2900000/pinctrl@300b000/spdif@0"; spdif_pins_b = "/soc@2900000/pinctrl@300b000/spdif_sleep@0"; dmic_pins_a = "/soc@2900000/pinctrl@300b000/dmic@0"; dmic_pins_b = "/soc@2900000/pinctrl@300b000/dmic_sleep@0"; csi_mclk0_pins_a = "/soc@2900000/pinctrl@300b000/csi_mclk0@0"; csi_mclk0_pins_b = "/soc@2900000/pinctrl@300b000/csi_mclk0@1"; csi_mclk1_pins_a = "/soc@2900000/pinctrl@300b000/csi_mclk1@0"; csi_mclk1_pins_b = "/soc@2900000/pinctrl@300b000/csi_mclk1@1"; scr0_pins_a = "/soc@2900000/pinctrl@300b000/scr0@0"; scr0_pins_b = "/soc@2900000/pinctrl@300b000/scr0@1"; scr0_pins_c = "/soc@2900000/pinctrl@300b000/scr0@2"; scr1_pins_a = "/soc@2900000/pinctrl@300b000/scr1@0"; scr1_pins_b = "/soc@2900000/pinctrl@300b000/scr1@1"; scr1_pins_c = "/soc@2900000/pinctrl@300b000/scr1@2"; nand0_pins_a = "/soc@2900000/pinctrl@300b000/nand0@0"; nand0_pins_b = "/soc@2900000/pinctrl@300b000/nand0@1"; nand0_pins_c = "/soc@2900000/pinctrl@300b000/nand0@2"; ccir_clk_pin_a = "/soc@2900000/pinctrl@300b000/ac200@2"; ccir_clk_pin_b = "/soc@2900000/pinctrl@300b000/ac200@3"; gmac_pins_a = "/soc@2900000/pinctrl@300b000/gmac@0"; gmac_pins_b = "/soc@2900000/pinctrl@300b000/gmac@1"; gmac1_pins_a = "/soc@2900000/pinctrl@300b000/gmac1@0"; gmac1_pins_b = "/soc@2900000/pinctrl@300b000/gmac1@1"; ledc_pins_a = "/soc@2900000/pinctrl@300b000/ledc@0"; ledc_pins_b = "/soc@2900000/pinctrl@300b000/ledc@1"; lvds0_pins_a = "/soc@2900000/pinctrl@300b000/lvds0@0"; lvds0_pins_b = "/soc@2900000/pinctrl@300b000/lvds0@1"; lvds1_pins_a = "/soc@2900000/pinctrl@300b000/lvds1@0"; lvds1_pins_b = "/soc@2900000/pinctrl@300b000/lvds1@1"; lvds2_pins_a = "/soc@2900000/pinctrl@300b000/lvds2@0"; lvds2_pins_b = "/soc@2900000/pinctrl@300b000/lvds2@1"; lvds3_pins_a = "/soc@2900000/pinctrl@300b000/lvds3@0"; lvds3_pins_b = "/soc@2900000/pinctrl@300b000/lvds3@1"; lcd1_lvds2link_pins_a = "/soc@2900000/pinctrl@300b000/lcd1_lvds2link@0"; lcd1_lvds2link_pins_b = "/soc@2900000/pinctrl@300b000/lcd1_lvds2link@1"; lvds2link_pins_a = "/soc@2900000/pinctrl@300b000/lvds2link@0"; lvds2link_pins_b = "/soc@2900000/pinctrl@300b000/lvds2link@1"; rgb24_pins_a = "/soc@2900000/pinctrl@300b000/rgb24@0"; rgb24_pins_b = "/soc@2900000/pinctrl@300b000/rgb24@1"; rgb18_pins_a = "/soc@2900000/pinctrl@300b000/rgb18@0"; rgb18_pins_b = "/soc@2900000/pinctrl@300b000/rgb18@1"; eink_pins_a = "/soc@2900000/pinctrl@300b000/eink@0"; eink_pins_b = "/soc@2900000/pinctrl@300b000/eink@1"; dsi4lane_pins_a = "/soc@2900000/pinctrl@300b000/dsi4lane@0"; dsi4lane_pins_b = "/soc@2900000/pinctrl@300b000/dsi4lane@1"; pwm0_pin_a = "/soc@2900000/pinctrl@300b000/pwm0_pin_a"; pwm0_pin_b = "/soc@2900000/pinctrl@300b000/pwm0_pin_b"; pwm1_pin_a = "/soc@2900000/pinctrl@300b000/pwm1_pin_a"; pwm1_pin_b = "/soc@2900000/pinctrl@300b000/pwm1_pin_b"; gpu = "/soc@2900000/gpu@1800000"; rfkill = "/soc@2900000/rfkill"; addr_mgt = "/soc@2900000/addr_mgt"; btlpm = "/soc@2900000/btlpm"; standby_param = "/soc@2900000/standby_param@7000400"; reg_usb1_vbus = "/usb1-vbus"; axp2202_parameter = "/axp2202-parameter"; }; };
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D1-H / D1 与D1s 比较图 ，一眼看出区别posted in D1-H/D1s
名称 D1-H D1s 制程 22nm 22nm CPU XuanTie C906 RISC-V CPU @1.008GHz XuanTie C906 RISC-V CPU @1.008GHz 内存 外置 DDR2/DDR3 SDRAM @ 792MHz 内置 64 MB DDR2 @ 533MHz 外存 SD3.0/SDIO3.0/eMMC5.0 SD3.0/SDIO3.0/eMMC5.0 DSP HiFi4 DSP 无 编码器 JPEG/MJPEG 1080P@60fps JPEG/MJPEG 1080P@60fps 解码器 最大4K，支持格式： H.265， H.264， MPEG-1/2/4， JPEG， VC1， Xvid， Sorenson Spark 最大1080p，支持格式： H.265， H.264， MPEG-1/2/4， JPEG， VC1， Xvid， Sorenson Spark 图形 SmartColor2.0，DI 1080p@60fps，G2D SmartColor2.0，DI 1080p@60fps，G2D 视频输出 HDMI 4K@30fps， RGB 1080p@60fps， Dual link LVDS 1080p@60fps，， 4 lane MIPI DSI 1920 x 1200@60fps， CVBS 支持 NTSC与PAL制式 RGB 1080p@60fps， Dual link LVDS 1080p@60fps，， 4 lane MIPI DSI 1920 x 1200@60fps， CVBS 支持 NTSC与PAL制式 视频输入 8位CSI支持DVP， CVBS 输入支持 NTSC与PAL制式 8位CSI支持DVP， CVBS 输入支持 NTSC与PAL制式 音频Codec 2 DAC， 3 ADC， LINEOUTLP/N， LINEOUTRP/N， HPOUTL/R， MICIN1P/1N， MICIN2P/2N， MICIN3P/3N， LINEINL/R， FMINL/R 2 DAC， 3 ADC， HPOUTL/R ， MICIN3P/N， LINEINL/R， FMINL/R I2S 3*I2S 2*I2S DMIC 最大 8 DMIC 最大 8 DMIC OWA OWA TX 与 OWA RX, 支持 S/PDIF 接口 OWA TX 与 OWA RX, 支持 S/PDIF 接口 安全 AES, DES, 3DES, RSA, MD5, SHA, HMAC， 2kbit OTP efuse AES, DES, 3DES, RSA, MD5, SHA, HMAC， 2kbit OTP efuse 外设 USB 2.0 DRD (USB0) ， USB 2.0 HOST (USB1), 10/100/1000 Mbps RGMII 或 RMII 接口, 6 个 UART 控制器, 2 个 SPI controllers (SPI0, SPI1), 4 个 TWI 控制器, CIR RX and CIR TX, 8 个独立 PWM 通道, 2-ch GPADC, 4-ch TPADC, 1-ch LRADC, LEDC USB 2.0 DRD (USB0) ， USB 2.0 HOST (USB1), 10/100/1000 Mbps RGMII 或 RMII 接口, 6 个 UART 控制器, 2 个 SPI controllers (SPI0, SPI1), 4 个 TWI 控制器, CIR RX and CIR TX, 8 个独立 PWM 通道, 2-ch GPADC, 4-ch TPADC, LEDC 封装 LFBGA 337, 13 mm x 13 mm eLQFP128, 14 mm x 14 mm x 1.4 mm 图片版本
实物图
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YuzukiCK1N - 基于全志V3x的触屏小电脑【开源硬件】posted in 全志方案讨论区
YuzukiCK1N小电脑
- 支持USB
- 3.5音频输出
- 板载百兆网络
- eMMC储存
- Wi-Fi
- 128M内存，ARM A7
- 4寸方屏，支持480480或720720分辨率
- 电容触摸
软件
软件使用 Linux 5.4.180、U-Boot 2022.01
SDK：https://github.com/YuzukiHD/Buildroot-YuzukiSBC
SDK开发说明：https://yuzukihd.gloomyghost.com/Buildroot-YuzukiSBC/#/
固件下载：https://github.com/YuzukiHD/Buildroot-YuzukiSBC/releases/硬件
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Reply: 请教下T113的Uboot是如何把fdt地址传给内核的？posted in 全志方案讨论区
请参阅：
tina-d1-h/lichee/brandy-2.0/u-boot-2018/board/sunxi/sunxi_replace_fdt.c
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Reply: D1 / D1s 可以用的 5.5元的 1280*400 长条形MIPI屏, 未验证posted in D1-H/D1s
{0xB0, 1, {0x5A}}, {0xB1, 1, {0x00}}, {0x89, 1, {0x01}}, {0x91, 1, {0x17}}, {0xB1, 1, {0x03}}, {0x2C, 1, {0x28}}, {0x00, 1, {0xB7}}, {0x01, 1, {0x1B}}, {0x02, 1, {0x00}}, {0x03, 1, {0x00}}, {0x04, 1, {0x00}}, {0x05, 1, {0x00}}, {0x06, 1, {0x00}}, {0x07, 1, {0x00}}, {0x08, 1, {0x00}}, {0x09, 1, {0x00}}, {0x0A, 1, {0x01}}, {0x0B, 1, {0x01}}, {0x0C, 1, {0x00}}, {0x0D, 1, {0x00}}, {0x0E, 1, {0x24}}, {0x0F, 1, {0x1C}}, {0x10, 1, {0xC9}}, {0x11, 1, {0x60}}, {0x12, 1, {0x70}}, {0x13, 1, {0x01}}, {0x14, 1, {0xE7}}, {0x15, 1, {0xFF}}, {0x16, 1, {0x3D}}, {0x17, 1, {0x0E}}, {0x18, 1, {0x01}}, {0x19, 1, {0x00}}, {0x1A, 1, {0x00}}, {0x1B, 1, {0xFC}}, {0x1C, 1, {0x0B}}, {0x1D, 1, {0xA0}}, {0x1E, 1, {0x03}}, {0x1F, 1, {0x04}}, {0x20, 1, {0x0C}}, {0x21, 1, {0x00}}, {0x22, 1, {0x04}}, {0x23, 1, {0x81}}, {0x24, 1, {0x1F}}, {0x25, 1, {0x10}}, {0x26, 1, {0x9B}}, {0x2D, 1, {0x01}}, {0x2E, 1, {0x84}}, {0x2F, 1, {0x00}}, {0x30, 1, {0x02}}, {0x31, 1, {0x08}}, {0x32, 1, {0x01}}, {0x33, 1, {0x1C}}, {0x34, 1, {0x40}}, {0x35, 1, {0xFF}}, {0x36, 1, {0xFF}}, {0x37, 1, {0xFF}}, {0x38, 1, {0xFF}}, {0x39, 1, {0xFF}}, {0x3A, 1, {0x05}}, {0x3B, 1, {0x00}}, {0x3C, 1, {0x00}}, {0x3D, 1, {0x00}}, {0x3E, 1, {0xCF}}, {0x3F, 1, {0x84}}, {0x40, 1, {0x2F}}, {0x41, 1, {0xFC}}, {0x42, 1, {0x01}}, {0x43, 1, {0x40}}, {0x44, 1, {0x05}}, {0x45, 1, {0xE8}}, {0x46, 1, {0x16}}, {0x47, 1, {0x00}}, {0x48, 1, {0x00}}, {0x49, 1, {0x88}}, {0x4A, 1, {0x08}}, {0x4B, 1, {0x05}}, {0x4C, 1, {0x03}}, {0x4D, 1, {0xD0}}, {0x4E, 1, {0x13}}, {0x4F, 1, {0xFF}}, {0x50, 1, {0x0A}}, {0x51, 1, {0x53}}, {0x52, 1, {0x26}}, {0x53, 1, {0x22}}, {0x54, 1, {0x09}}, {0x55, 1, {0x22}}, {0x56, 1, {0x00}}, {0x57, 1, {0x1C}}, {0x58, 1, {0x03}}, {0x59, 1, {0x3F}}, {0x5A, 1, {0x28}}, {0x5B, 1, {0x01}}, {0x5C, 1, {0xCC}}, {0x5D, 1, {0x21}}, {0x5E, 1, {0x84}}, {0x5F, 1, {0x10}}, {0x60, 1, {0x42}}, {0x61, 1, {0x08}}, {0x62, 1, {0x21}}, {0x63, 1, {0x84}}, {0x64, 1, {0x80}}, {0x65, 1, {0x0C}}, {0x66, 1, {0x74}}, {0x67, 1, {0x4C}}, {0x68, 1, {0x09}}, {0x69, 1, {0x12}}, {0x6A, 1, {0x42}}, {0x6B, 1, {0x08}}, {0x6C, 1, {0x21}}, {0x6D, 1, {0x84}}, {0x6E, 1, {0x10}}, {0x6F, 1, {0x42}}, {0x70, 1, {0x08}}, {0x71, 1, {0xE9}}, {0x72, 1, {0xC4}}, {0x73, 1, {0xD7}}, {0x74, 1, {0xD6}}, {0x75, 1, {0x28}}, {0x76, 1, {0x00}}, {0x77, 1, {0x00}}, {0x78, 1, {0x0F}}, {0x79, 1, {0xE0}}, {0x7A, 1, {0x01}}, {0x7B, 1, {0xFF}}, {0x7C, 1, {0xFF}}, {0x7D, 1, {0x0F}}, {0x7E, 1, {0x41}}, {0x7F, 1, {0xFE}}, {0xB1, 1, {0x02}}, {0x00, 1, {0xFF}}, {0x01, 1, {0x05}}, {0x02, 1, {0xF0}}, {0x03, 1, {0x00}}, {0x04, 1, {0x94}}, {0x05, 1, {0x48}}, {0x06, 1, {0xC8}}, {0x07, 1, {0x0A}}, {0x08, 1, {0x00}}, {0x09, 1, {0x00}}, {0x0A, 1, {0x00}}, {0x0B, 1, {0x10}}, {0x0C, 1, {0xE6}}, {0x0D, 1, {0x0D}}, {0x0F, 1, {0x00}}, {0x10, 1, {0xF9}}, {0x11, 1, {0x4D}}, {0x12, 1, {0x9E}}, {0x13, 1, {0x8F}}, {0x14, 1, {0xDF}}, {0x15, 1, {0x15}}, {0x16, 1, {0xE4}}, {0x17, 1, {0x6A}}, {0x18, 1, {0xAB}}, {0x19, 1, {0xD7}}, {0x1A, 1, {0x78}}, {0x1B, 1, {0xFE}}, {0x1C, 1, {0xFF}}, {0x1D, 1, {0xFF}}, {0x1E, 1, {0xFF}}, {0x1F, 1, {0xFF}}, {0x20, 1, {0xFF}}, {0x21, 1, {0xFF}}, {0x22, 1, {0xFF}}, {0x23, 1, {0xFF}}, {0x24, 1, {0xFF}}, {0x25, 1, {0xFF}}, {0x26, 1, {0xFF}}, {0x27, 1, {0x1F}}, {0x28, 1, {0xFF}}, {0x29, 1, {0xFF}}, {0x2A, 1, {0xFF}}, {0x2B, 1, {0xFF}}, {0x2C, 1, {0xFF}}, {0x2D, 1, {0x07}}, {0x33, 1, {0x3F}}, {0x35, 1, {0x7F}}, {0x36, 1, {0x3F}}, {0x38, 1, {0xFF}}, {0x3A, 1, {0x80}}, {0x3B, 1, {0x01}}, {0x3C, 1, {0x00}}, {0x3D, 1, {0x2F}}, {0x3E, 1, {0x00}}, {0x3F, 1, {0xE0}}, {0x40, 1, {0x05}}, {0x41, 1, {0x00}}, {0x42, 1, {0xBC}}, {0x43, 1, {0x00}}, {0x44, 1, {0x80}}, {0x45, 1, {0x07}}, {0x46, 1, {0x00}}, {0x47, 1, {0x00}}, {0x48, 1, {0x9B}}, {0x49, 1, {0xD2}}, {0x4A, 1, {0xC1}}, {0x4B, 1, {0x83}}, {0x4C, 1, {0x17}}, {0x4D, 1, {0xC0}}, {0x4E, 1, {0x0F}}, {0x4F, 1, {0xF1}}, {0x50, 1, {0x78}}, {0x51, 1, {0x7A}}, {0x52, 1, {0x34}}, {0x53, 1, {0x99}}, {0x54, 1, {0xA2}}, {0x55, 1, {0x02}}, {0x56, 1, {0x14}}, {0x57, 1, {0xB8}}, {0x58, 1, {0xDC}}, {0x59, 1, {0xD4}}, {0x5A, 1, {0xEF}}, {0x5B, 1, {0xF7}}, {0x5C, 1, {0xFB}}, {0x5D, 1, {0xFD}}, {0x5E, 1, {0x7E}}, {0x5F, 1, {0xBF}}, {0x60, 1, {0xEF}}, {0x61, 1, {0xE6}}, {0x62, 1, {0x76}}, {0x63, 1, {0x73}}, {0x64, 1, {0xBB}}, {0x65, 1, {0xDD}}, {0x66, 1, {0x6E}}, {0x67, 1, {0x37}}, {0x68, 1, {0x8C}}, {0x69, 1, {0x08}}, {0x6A, 1, {0x31}}, {0x6B, 1, {0xB8}}, {0x6C, 1, {0xB8}}, {0x6D, 1, {0xB8}}, {0x6E, 1, {0xB8}}, {0x6F, 1, {0xB8}}, {0x70, 1, {0x5C}}, {0x71, 1, {0x2E}}, {0x72, 1, {0x17}}, {0x73, 1, {0x00}}, {0x74, 1, {0x00}}, {0x75, 1, {0x00}}, {0x76, 1, {0x00}}, {0x77, 1, {0x00}}, {0x78, 1, {0x00}}, {0x79, 1, {0x00}}, {0x7A, 1, {0xDC}}, {0x7B, 1, {0xDC}}, {0x7C, 1, {0xDC}}, {0x7D, 1, {0xDC}}, {0x7E, 1, {0xDC}}, {0x7F, 1, {0x6E}}, {0x0B, 1, {0x00}}, {0xB1, 1, {0x03}}, {0x2C, 1, {0x2C}}, {0xB1, 1, {0x00}}, {0x89, 1, {0x03}},
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Reply: T113奇怪的屏幕刷新问题posted in 全志方案讨论区
@efancier buildroot更新了，修复了i2c，de，uart等一堆问题，source envsetup.sh 更新然后重新make xxxx_defconfig就行了
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Reply: Buildroot-2022.2主线已经支持Nezha开发板，原来有这么多大佬喜欢这款芯片，真的太香了！posted in D1-H/D1s
不过Linux和Uboot都是smaeul 的 fork，更倾向于主线kernel+patch这样的。
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Reply: 求教D1+Tina能否直接将终端输出到屏幕进行操作呢？posted in D1-H/D1s
可以，详见：D1咋把控制台弄到hdmi上呢？
https://bbs.aw-ol.com/topic/1320/share/4
eim
